mirror of
https://github.com/torvalds/linux.git
synced 2024-12-04 01:51:34 +00:00
f246abd67f
For test purposes, pretend that that CXL DVSEC ranges are not in active use and the device is ready CXL.mem operation. Link: https://lore.kernel.org/r/164298431119.3018233.17175518196764977542.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com> |
||
---|---|---|
.. | ||
test | ||
config_check.c | ||
Kbuild | ||
mock_acpi.c | ||
mock_mem.c |