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f159f2941d
Just a single fix to address coherency issue reported[1] by removing the GICv2m address from the DMA ranges as it loose coherency if mapped as cacheable at the SMMU due to the attribute combining rules. The GICv2m range is normally programmed for Device memory attributes. [1] https://lore.kernel.org/stable/0a1d437d-9ea0-de83-3c19-e07f560ad37c@arm.com/ -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmIKZaEACgkQAEG6vDF+ 4pjSURAA1UMHZlUcrm5QSeTBMwLW/OTyNX6HXSALbK2G+0yTanbrSbdkh/0dzu8X QGXjgLGaerTYW5Mn0CRVYVJIeCVpkmdoq7x3SPBxkYjA5VkbJvHtBYgL+pIenIZQ 1Q9dJgwkftUzUFHqlDcg03QvK9ZWoql1Ms/mQOJ+qQMBTCb9Ubmg3o5U4xu/y0LD QPoyCwNGAI8nVVS5H9KsOhT5pokeu25duLgNT/hbdzQKzF7YlDTXvYDIfJ+Ob03y SiUTORaLiDqUtAYkL02cYP6jvrxIvlYVtwxr6CWIAg41izPbTYYEdTkYYcigQ5r3 w1wzSXyjQDQO3VjVfI7aTckwuJaS/4N5U/P+JwoBYOjU/5Xx7Qh5dD4ODnzBxHHK hFVBcK7m4msYmfpBT5TNmNU27/2HUEcvYIyZYm05wQ3rDhOfCHaDHLTn4+wopCId K9tm2INQPD1yW8+2Q5QJmmIo93bZ/tA3EzykZh77yEkjKIRN9MXLPKeJ1FBLwdqM fpBGrTBoiiVS6cwg+FfCriRhbE64fPLzWkOK1JukHPUTg7XKD2L7yhBxP8NQGgms 6rBhd9wcUReGZuM/iObm94djJ6XEJp5K6bmU3iGiaNRQOOcIrHj4sU9d5GtFOmm9 Mh+uVDqVwxgEYHqlY/yYKtsyo4kzcp6BR3Jr9pa/eNYA1bj0fcY= =+vSS -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIPyagACgkQmmx57+YA GNnV7g/+OxbuQWVgmyW2ztfyOwZHGvpZD8T+e42TzHIfnlA+UxvCjO+kJKWAIH7v K7od3n1N8Rwjhzy2oO9EyTW+ptiH+rodbpif4jtSjx9MGQBDLfhN9UFgN/2CFqzA Gm8qNxta4SE2lU2KyDQ9BKa9yfyN/YCXR2cvP69FV/pe5DPnMawzp8+pWhdsH2DO v3deR+lsU/NMm0E5KLTC10hzrCum2le3HuzN02nJ8bD0GxOTcx+hyQ+zocuQmoi0 p86ztyq7cR7EOlW6Hs5v+clPt6E63CU0T3ci8XQAFBthohfzj7stVNBGjssVR2lW wXrJlakGDrVxCYI6QrxZ8aLwKAEV1T3W+hQRu99pTqvR1ntqrXOEDQNrP8HjvGRE c81k7UkcFM2e1Qrv7hAlIa9a1LWEYpFKXds97EPLZoZ399D6nOS4xEiUrHZ2Kwo7 X/46oO27BZO5/Gz8bI5iISBXLSLCLqGt94tTsRLS9R7tNLJXrBAWewz68QCx6kv7 lwmGSSPoemHgZR1V4wGImyGvr0hDR/A0no2HqLbYb/4rPzYehsHtqTEnMvqoHDbc nbobJdHN0K931/sf6L3/T/dRtxR4mnz93YPDfvpMx9M3frTXO0bNNk919e+p6aMt ZRI+TdwQC/vkEAwFsZDt5QQ+Nq5/Plpi+DsyFnfyeOqlwCao4iI= =XE1F -----END PGP SIGNATURE----- Merge tag 'juno-fix-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes Arm Juno fix for v5.17 Just a single fix to address coherency issue reported[1] by removing the GICv2m address from the DMA ranges as it loose coherency if mapped as cacheable at the SMMU due to the attribute combining rules. The GICv2m range is normally programmed for Device memory attributes. [1] https://lore.kernel.org/stable/0a1d437d-9ea0-de83-3c19-e07f560ad37c@arm.com/ * tag 'juno-fix-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Remove GICv2m dma-range Link: https://lore.kernel.org/r/20220214142615.2375269-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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