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Exynos PLL code updates and overall minor clean-ups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJYiz9+AAoJEE1bIKeAnHqLQZQP/RbrWxuvEcUiMJPkzVRCJW/v YRSC43ZGLQ2xDypO29pyzPKbxtZPLqA+Rlg5R2M8VcP6kUVgcHkQU4xLJTMBjKVR 2daBdSR+vUdkrTJ1Dgm37x2TaSZZ8dmCUkQn5H8HSRKXuf+Z+TTOm2p0Ysl2fX93 840CkRxBhe6a4rVS/PMopMLeJrIcBJJcqt8vNtzK31KJDqsPZy2j5txRA1NqT0Dp 1E7Gb4bb+xdFb+g3f1Qpyznn34dO9sUUhVYUyTsibz/IReEGshcSz11bbrupgTp1 OBr6x5j8MYcbj41qC7kkIN6Vz+KLBGyBPnd7SE5j3yE8y2wykZALdutFFDvrd+nb hBTKRErmfXQIPk74magrd6AvfVhHS6d6UbM6pISE9pit9tqUAcHGBJ3GDe+afnNi DZPem8S1DmRp6WjYfXSOJQrSACqx/jjV8uo0erDjYYr7oAEBaWo7e0bqyazzQL2/ HNzp2LjM9QT+KFFJW/TP/cJju+l59ugp/xHOGJkBWTOBU8j9rKu3cVipEfcndZ52 sxnemcMPmZ3IPQjIaW8GYyshFH0hsxU0AIkc+Hko2Qyvkc/4DFvJTHbZOC+fU8ix jBQEIoGT+kugFPloBrwdnMBOOx/5lSMcF/WqwZgIhLrm+ll5npf02bCYTt6tGUZd z76TgLRCLn8mopfjCAp6 =QhYQ -----END PGP SIGNATURE----- Merge tag 'clk-v4.11-samsung-2' of git://linuxtv.org/snawrocki/samsung into clk-next Pull Samsung clk driver updates from Sylwester Nawrocki: - Exporting clock IDs for Exynos5433 SoC MIPI DSI DPHY - Exynos PLL code updates and overall minor clean-ups * tag 'clk-v4.11-samsung-2' of git://linuxtv.org/snawrocki/samsung: clk: samsung: mark s3c...._clk_sleep_init() as __init clk: samsung: Add enable/disable support for PLL35XX clocks clk: samsung: exynos5433: Correct typos in SoC name clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks |
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.. | ||
clk-cpu.c | ||
clk-cpu.h | ||
clk-exynos4.c | ||
clk-exynos7.c | ||
clk-exynos3250.c | ||
clk-exynos5250.c | ||
clk-exynos5260.c | ||
clk-exynos5260.h | ||
clk-exynos5410.c | ||
clk-exynos5420.c | ||
clk-exynos5433.c | ||
clk-exynos5440.c | ||
clk-exynos-audss.c | ||
clk-exynos-clkout.c | ||
clk-pll.c | ||
clk-pll.h | ||
clk-s3c64xx.c | ||
clk-s3c2410-dclk.c | ||
clk-s3c2410.c | ||
clk-s3c2412.c | ||
clk-s3c2443.c | ||
clk-s5pv210-audss.c | ||
clk-s5pv210.c | ||
clk.c | ||
clk.h | ||
Kconfig | ||
Makefile |