Alexandre Belloni f09757ab40 spi: dw: document Microsemi integration ... The integration of the Designware SPI controller on Microsemi SoCs requires an extra register set to be able to give the IP control of the SPI interface. Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>		2018-07-31 15:41:14 +01:00
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bindings	spi: dw: document Microsemi integration	2018-07-31 15:41:14 +01:00
00-INDEX
booting-without-of.txt	dt: booting-without-of: DT fix s/#interrupt-cell/#interrupt-cells/	2018-01-22 05:48:34 +11:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt	of: overlay: Stop leaking resources on overlay removal	2018-04-26 21:18:13 -05:00
todo.txt
usage-model.txt