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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 136 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.384967451@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
122 lines
3.0 KiB
C
122 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2006-2007 PA Semi, Inc
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*
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Driver for the PWRficient onchip rng
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/hw_random.h>
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#include <linux/delay.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#define SDCRNG_CTL_REG 0x00
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#define SDCRNG_CTL_FVLD_M 0x0000f000
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#define SDCRNG_CTL_FVLD_S 12
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#define SDCRNG_CTL_KSZ 0x00000800
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#define SDCRNG_CTL_RSRC_CRG 0x00000010
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#define SDCRNG_CTL_RSRC_RRG 0x00000000
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#define SDCRNG_CTL_CE 0x00000004
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#define SDCRNG_CTL_RE 0x00000002
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#define SDCRNG_CTL_DR 0x00000001
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#define SDCRNG_CTL_SELECT_RRG_RNG (SDCRNG_CTL_RE | SDCRNG_CTL_RSRC_RRG)
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#define SDCRNG_CTL_SELECT_CRG_RNG (SDCRNG_CTL_CE | SDCRNG_CTL_RSRC_CRG)
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#define SDCRNG_VAL_REG 0x20
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#define MODULE_NAME "pasemi_rng"
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static int pasemi_rng_data_present(struct hwrng *rng, int wait)
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{
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void __iomem *rng_regs = (void __iomem *)rng->priv;
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int data, i;
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for (i = 0; i < 20; i++) {
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data = (in_le32(rng_regs + SDCRNG_CTL_REG)
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& SDCRNG_CTL_FVLD_M) ? 1 : 0;
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if (data || !wait)
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break;
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udelay(10);
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}
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return data;
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}
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static int pasemi_rng_data_read(struct hwrng *rng, u32 *data)
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{
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void __iomem *rng_regs = (void __iomem *)rng->priv;
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*data = in_le32(rng_regs + SDCRNG_VAL_REG);
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return 4;
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}
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static int pasemi_rng_init(struct hwrng *rng)
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{
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void __iomem *rng_regs = (void __iomem *)rng->priv;
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u32 ctl;
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ctl = SDCRNG_CTL_DR | SDCRNG_CTL_SELECT_RRG_RNG | SDCRNG_CTL_KSZ;
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out_le32(rng_regs + SDCRNG_CTL_REG, ctl);
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out_le32(rng_regs + SDCRNG_CTL_REG, ctl & ~SDCRNG_CTL_DR);
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return 0;
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}
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static void pasemi_rng_cleanup(struct hwrng *rng)
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{
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void __iomem *rng_regs = (void __iomem *)rng->priv;
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u32 ctl;
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ctl = SDCRNG_CTL_RE | SDCRNG_CTL_CE;
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out_le32(rng_regs + SDCRNG_CTL_REG,
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in_le32(rng_regs + SDCRNG_CTL_REG) & ~ctl);
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}
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static struct hwrng pasemi_rng = {
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.name = MODULE_NAME,
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.init = pasemi_rng_init,
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.cleanup = pasemi_rng_cleanup,
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.data_present = pasemi_rng_data_present,
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.data_read = pasemi_rng_data_read,
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};
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static int rng_probe(struct platform_device *pdev)
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{
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void __iomem *rng_regs;
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rng_regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(rng_regs))
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return PTR_ERR(rng_regs);
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pasemi_rng.priv = (unsigned long)rng_regs;
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pr_info("Registering PA Semi RNG\n");
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return devm_hwrng_register(&pdev->dev, &pasemi_rng);
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}
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static const struct of_device_id rng_match[] = {
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{ .compatible = "1682m-rng", },
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{ .compatible = "pasemi,pwrficient-rng", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, rng_match);
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static struct platform_driver rng_driver = {
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.driver = {
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.name = "pasemi-rng",
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.of_match_table = rng_match,
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},
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.probe = rng_probe,
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};
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module_platform_driver(rng_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
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MODULE_DESCRIPTION("H/W RNG driver for PA Semi processor");
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