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A HW issue requires limiting the receive window size to 23 pages of internal memory. These pages can be configured to different sizes, thus the RDMA driver needs to know the page size to enforce the upper limit. Also assign explicit enum values. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
175 lines
4.6 KiB
C
175 lines
4.6 KiB
C
/*
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* Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _CXGB3_OFFLOAD_CTL_DEFS_H
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#define _CXGB3_OFFLOAD_CTL_DEFS_H
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enum {
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GET_MAX_OUTSTANDING_WR = 0,
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GET_TX_MAX_CHUNK = 1,
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GET_TID_RANGE = 2,
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GET_STID_RANGE = 3,
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GET_RTBL_RANGE = 4,
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GET_L2T_CAPACITY = 5,
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GET_MTUS = 6,
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GET_WR_LEN = 7,
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GET_IFF_FROM_MAC = 8,
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GET_DDP_PARAMS = 9,
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GET_PORTS = 10,
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ULP_ISCSI_GET_PARAMS = 11,
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ULP_ISCSI_SET_PARAMS = 12,
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RDMA_GET_PARAMS = 13,
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RDMA_CQ_OP = 14,
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RDMA_CQ_SETUP = 15,
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RDMA_CQ_DISABLE = 16,
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RDMA_CTRL_QP_SETUP = 17,
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RDMA_GET_MEM = 18,
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GET_RX_PAGE_INFO = 50,
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};
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/*
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* Structure used to describe a TID range. Valid TIDs are [base, base+num).
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*/
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struct tid_range {
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unsigned int base; /* first TID */
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unsigned int num; /* number of TIDs in range */
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};
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/*
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* Structure used to request the size and contents of the MTU table.
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*/
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struct mtutab {
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unsigned int size; /* # of entries in the MTU table */
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const unsigned short *mtus; /* the MTU table values */
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};
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struct net_device;
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/*
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* Structure used to request the adapter net_device owning a given MAC address.
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*/
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struct iff_mac {
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struct net_device *dev; /* the net_device */
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const unsigned char *mac_addr; /* MAC address to lookup */
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u16 vlan_tag;
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};
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struct pci_dev;
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/*
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* Structure used to request the TCP DDP parameters.
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*/
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struct ddp_params {
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unsigned int llimit; /* TDDP region start address */
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unsigned int ulimit; /* TDDP region end address */
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unsigned int tag_mask; /* TDDP tag mask */
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struct pci_dev *pdev;
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};
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struct adap_ports {
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unsigned int nports; /* number of ports on this adapter */
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struct net_device *lldevs[2];
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};
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/*
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* Structure used to return information to the iscsi layer.
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*/
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struct ulp_iscsi_info {
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unsigned int offset;
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unsigned int llimit;
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unsigned int ulimit;
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unsigned int tagmask;
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unsigned int pgsz3;
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unsigned int pgsz2;
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unsigned int pgsz1;
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unsigned int pgsz0;
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unsigned int max_rxsz;
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unsigned int max_txsz;
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struct pci_dev *pdev;
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};
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/*
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* Structure used to return information to the RDMA layer.
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*/
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struct rdma_info {
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unsigned int tpt_base; /* TPT base address */
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unsigned int tpt_top; /* TPT last entry address */
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unsigned int pbl_base; /* PBL base address */
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unsigned int pbl_top; /* PBL last entry address */
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unsigned int rqt_base; /* RQT base address */
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unsigned int rqt_top; /* RQT last entry address */
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unsigned int udbell_len; /* user doorbell region length */
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unsigned long udbell_physbase; /* user doorbell physical start addr */
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void __iomem *kdb_addr; /* kernel doorbell register address */
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struct pci_dev *pdev; /* associated PCI device */
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};
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/*
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* Structure used to request an operation on an RDMA completion queue.
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*/
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struct rdma_cq_op {
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unsigned int id;
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unsigned int op;
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unsigned int credits;
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};
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/*
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* Structure used to setup RDMA completion queues.
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*/
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struct rdma_cq_setup {
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unsigned int id;
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unsigned long long base_addr;
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unsigned int size;
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unsigned int credits;
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unsigned int credit_thres;
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unsigned int ovfl_mode;
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};
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/*
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* Structure used to setup the RDMA control egress context.
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*/
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struct rdma_ctrlqp_setup {
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unsigned long long base_addr;
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unsigned int size;
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};
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/*
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* Offload TX/RX page information.
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*/
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struct ofld_page_info {
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unsigned int page_size; /* Page size, should be a power of 2 */
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unsigned int num; /* Number of pages */
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};
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#endif /* _CXGB3_OFFLOAD_CTL_DEFS_H */
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