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ff1b2cde3f
The following dispc functions are also changed to incorporate channel as an argument: -dispc_lclk_rate() -dispc_pclk_rate() -dispc_set_pol_freq() -dispc_set_clock_div() -dispc_get_clock_div() Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Mukund Mittal <mmittal@ti.com> Signed-off-by: Samreen <samreen@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> [tomi.valkeinen@nokia.com: fixed trivial compile error] Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
185 lines
4.1 KiB
C
185 lines
4.1 KiB
C
/*
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* linux/drivers/video/omap2/dss/sdi.c
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*
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* Copyright (C) 2009 Nokia Corporation
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* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define DSS_SUBSYS_NAME "SDI"
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/regulator/consumer.h>
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#include <plat/display.h>
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#include <plat/cpu.h>
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#include "dss.h"
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static struct {
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bool skip_init;
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bool update_enabled;
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struct regulator *vdds_sdi_reg;
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} sdi;
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static void sdi_basic_init(struct omap_dss_device *dssdev)
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{
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dispc_set_parallel_interface_mode(dssdev->manager->id,
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OMAP_DSS_PARALLELMODE_BYPASS);
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dispc_set_lcd_display_type(dssdev->manager->id,
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OMAP_DSS_LCD_DISPLAY_TFT);
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dispc_set_tft_data_lines(dssdev->manager->id, 24);
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dispc_lcd_enable_signal_polarity(1);
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}
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int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
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{
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struct omap_video_timings *t = &dssdev->panel.timings;
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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u16 lck_div, pck_div;
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unsigned long fck;
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unsigned long pck;
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int r;
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r = omap_dss_start_device(dssdev);
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if (r) {
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DSSERR("failed to start device\n");
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goto err0;
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}
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r = regulator_enable(sdi.vdds_sdi_reg);
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if (r)
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goto err1;
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/* In case of skip_init sdi_init has already enabled the clocks */
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if (!sdi.skip_init)
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
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sdi_basic_init(dssdev);
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/* 15.5.9.1.2 */
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dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;
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dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
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dssdev->panel.acbi, dssdev->panel.acb);
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if (!sdi.skip_init) {
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r = dss_calc_clock_div(1, t->pixel_clock * 1000,
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&dss_cinfo, &dispc_cinfo);
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} else {
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r = dss_get_clock_div(&dss_cinfo);
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r = dispc_get_clock_div(dssdev->manager->id, &dispc_cinfo);
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}
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if (r)
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goto err2;
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fck = dss_cinfo.fck;
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lck_div = dispc_cinfo.lck_div;
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pck_div = dispc_cinfo.pck_div;
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pck = fck / lck_div / pck_div / 1000;
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if (pck != t->pixel_clock) {
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DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
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"got %lu kHz\n",
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t->pixel_clock, pck);
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t->pixel_clock = pck;
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}
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dispc_set_lcd_timings(dssdev->manager->id, t);
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r = dss_set_clock_div(&dss_cinfo);
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if (r)
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goto err2;
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r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
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if (r)
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goto err2;
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if (!sdi.skip_init) {
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dss_sdi_init(dssdev->phy.sdi.datapairs);
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r = dss_sdi_enable();
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if (r)
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goto err1;
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mdelay(2);
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}
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dssdev->manager->enable(dssdev->manager);
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sdi.skip_init = 0;
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return 0;
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err2:
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
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regulator_disable(sdi.vdds_sdi_reg);
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err1:
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omap_dss_stop_device(dssdev);
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err0:
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return r;
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}
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EXPORT_SYMBOL(omapdss_sdi_display_enable);
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void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
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{
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dssdev->manager->disable(dssdev->manager);
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dss_sdi_disable();
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
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regulator_disable(sdi.vdds_sdi_reg);
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omap_dss_stop_device(dssdev);
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}
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EXPORT_SYMBOL(omapdss_sdi_display_disable);
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int sdi_init_display(struct omap_dss_device *dssdev)
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{
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DSSDBG("SDI init\n");
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return 0;
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}
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int sdi_init(bool skip_init)
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{
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/* we store this for first display enable, then clear it */
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sdi.skip_init = skip_init;
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sdi.vdds_sdi_reg = dss_get_vdds_sdi();
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if (IS_ERR(sdi.vdds_sdi_reg)) {
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DSSERR("can't get VDDS_SDI regulator\n");
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return PTR_ERR(sdi.vdds_sdi_reg);
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}
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/*
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* Enable clocks already here, otherwise there would be a toggle
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* of them until sdi_display_enable is called.
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*/
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if (skip_init)
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
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return 0;
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}
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void sdi_exit(void)
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{
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}
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