mirror of
https://github.com/torvalds/linux.git
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731a7378b8
Pull x86 trampoline rework from H. Peter Anvin: "This code reworks all the "trampoline"/"realmode" code (various bits that need to live in the first megabyte of memory, most but not all of which runs in real mode at some point) in the kernel into a single object. The main reason for doing this is that it eliminates the last place in the kernel where we needed pages to be mapped RWX. This code separates all that code into proper R/RW/RX pages." Fix up conflicts in arch/x86/kernel/Makefile (mca removed next to reboot code), and arch/x86/kernel/reboot.c (reboot code moved around in one branch, modified in this one), and arch/x86/tools/relocs.c (mostly same code came in earlier due to working around the ld bugs just before the 3.4 release). Also remove stale x86-relocs entry from scripts/.gitignore as per Peter Anvin. * commit '61f5446169046c217a5479517edac3a890c3bee7': (36 commits) x86, realmode: Move end signature into header.S x86, relocs: When printing an error, say relative or absolute x86, relocs: More relocations which may end up as absolute x86, relocs: Workaround for binutils 2.22.52.0.1 section bug xen-acpi-processor: Add missing #include <xen/xen.h> acpi, bgrd: Add missing <linux/io.h> to drivers/acpi/bgrt.c x86, realmode: Change EFER to a single u64 field x86, realmode: Move kernel/realmode.c to realmode/init.c x86, realmode: Move not-common bits out of trampoline_common.S x86, realmode: Mask out EFER.LMA when saving trampoline EFER x86, realmode: Fix no cache bits test in reboot_32.S x86, realmode: Make sure all generated files are listed in targets x86, realmode: build fix: remove duplicate build x86, realmode: read cr4 and EFER from kernel for 64-bit trampoline x86, realmode: fixes compilation issue in tboot.c x86, realmode: move relocs from scripts/ to arch/x86/tools x86, realmode: header for trampoline code x86, realmode: flattened rm hierachy x86, realmode: don't copy real_mode_header x86, realmode: fix 64-bit wakeup sequence ...
462 lines
11 KiB
ArmAsm
462 lines
11 KiB
ArmAsm
/*
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* linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit
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*
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* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
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* Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
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* Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
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* Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
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* Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com>
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*/
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#include <linux/linkage.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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#include <asm/segment.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/msr.h>
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#include <asm/cache.h>
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#include <asm/processor-flags.h>
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#include <asm/percpu.h>
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#include <asm/nops.h>
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#ifdef CONFIG_PARAVIRT
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#include <asm/asm-offsets.h>
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#include <asm/paravirt.h>
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#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg
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#else
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#define GET_CR2_INTO(reg) movq %cr2, reg
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#define INTERRUPT_RETURN iretq
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#endif
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/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
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* because we need identity-mapped pages.
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*
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*/
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#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
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L4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET)
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L3_PAGE_OFFSET = pud_index(__PAGE_OFFSET)
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L4_START_KERNEL = pgd_index(__START_KERNEL_map)
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L3_START_KERNEL = pud_index(__START_KERNEL_map)
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.text
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__HEAD
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.code64
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.globl startup_64
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startup_64:
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/*
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* At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
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* and someone has loaded an identity mapped page table
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* for us. These identity mapped page tables map all of the
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* kernel pages and possibly all of memory.
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*
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* %esi holds a physical pointer to real_mode_data.
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*
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* We come here either directly from a 64bit bootloader, or from
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* arch/x86_64/boot/compressed/head.S.
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*
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* We only come here initially at boot nothing else comes here.
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*
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* Since we may be loaded at an address different from what we were
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* compiled to run at we first fixup the physical addresses in our page
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* tables and then reload them.
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*/
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/* Compute the delta between the address I am compiled to run at and the
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* address I am actually running at.
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*/
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leaq _text(%rip), %rbp
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subq $_text - __START_KERNEL_map, %rbp
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/* Is the address not 2M aligned? */
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movq %rbp, %rax
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andl $~PMD_PAGE_MASK, %eax
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testl %eax, %eax
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jnz bad_address
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/* Is the address too large? */
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leaq _text(%rip), %rdx
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movq $PGDIR_SIZE, %rax
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cmpq %rax, %rdx
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jae bad_address
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/* Fixup the physical addresses in the page table
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*/
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addq %rbp, init_level4_pgt + 0(%rip)
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addq %rbp, init_level4_pgt + (L4_PAGE_OFFSET*8)(%rip)
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addq %rbp, init_level4_pgt + (L4_START_KERNEL*8)(%rip)
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addq %rbp, level3_ident_pgt + 0(%rip)
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addq %rbp, level3_kernel_pgt + (510*8)(%rip)
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addq %rbp, level3_kernel_pgt + (511*8)(%rip)
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addq %rbp, level2_fixmap_pgt + (506*8)(%rip)
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/* Add an Identity mapping if I am above 1G */
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leaq _text(%rip), %rdi
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andq $PMD_PAGE_MASK, %rdi
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movq %rdi, %rax
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shrq $PUD_SHIFT, %rax
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andq $(PTRS_PER_PUD - 1), %rax
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jz ident_complete
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leaq (level2_spare_pgt - __START_KERNEL_map + _KERNPG_TABLE)(%rbp), %rdx
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leaq level3_ident_pgt(%rip), %rbx
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movq %rdx, 0(%rbx, %rax, 8)
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movq %rdi, %rax
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shrq $PMD_SHIFT, %rax
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andq $(PTRS_PER_PMD - 1), %rax
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leaq __PAGE_KERNEL_IDENT_LARGE_EXEC(%rdi), %rdx
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leaq level2_spare_pgt(%rip), %rbx
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movq %rdx, 0(%rbx, %rax, 8)
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ident_complete:
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/*
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* Fixup the kernel text+data virtual addresses. Note that
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* we might write invalid pmds, when the kernel is relocated
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* cleanup_highmap() fixes this up along with the mappings
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* beyond _end.
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*/
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leaq level2_kernel_pgt(%rip), %rdi
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leaq 4096(%rdi), %r8
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/* See if it is a valid page table entry */
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1: testq $1, 0(%rdi)
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jz 2f
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addq %rbp, 0(%rdi)
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/* Go to the next page */
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2: addq $8, %rdi
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cmp %r8, %rdi
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jne 1b
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/* Fixup phys_base */
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addq %rbp, phys_base(%rip)
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/* Due to ENTRY(), sometimes the empty space gets filled with
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* zeros. Better take a jmp than relying on empty space being
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* filled with 0x90 (nop)
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*/
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jmp secondary_startup_64
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ENTRY(secondary_startup_64)
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/*
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* At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
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* and someone has loaded a mapped page table.
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*
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* %esi holds a physical pointer to real_mode_data.
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*
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* We come here either from startup_64 (using physical addresses)
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* or from trampoline.S (using virtual addresses).
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*
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* Using virtual addresses from trampoline.S removes the need
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* to have any identity mapped pages in the kernel page table
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* after the boot processor executes this code.
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*/
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/* Enable PAE mode and PGE */
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movl $(X86_CR4_PAE | X86_CR4_PGE), %eax
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movq %rax, %cr4
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/* Setup early boot stage 4 level pagetables. */
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movq $(init_level4_pgt - __START_KERNEL_map), %rax
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addq phys_base(%rip), %rax
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movq %rax, %cr3
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/* Ensure I am executing from virtual addresses */
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movq $1f, %rax
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jmp *%rax
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1:
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/* Check if nx is implemented */
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movl $0x80000001, %eax
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cpuid
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movl %edx,%edi
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/* Setup EFER (Extended Feature Enable Register) */
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movl $MSR_EFER, %ecx
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rdmsr
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btsl $_EFER_SCE, %eax /* Enable System Call */
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btl $20,%edi /* No Execute supported? */
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jnc 1f
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btsl $_EFER_NX, %eax
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1: wrmsr /* Make changes effective */
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/* Setup cr0 */
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#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
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X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
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X86_CR0_PG)
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movl $CR0_STATE, %eax
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/* Make changes effective */
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movq %rax, %cr0
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/* Setup a boot time stack */
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movq stack_start(%rip),%rsp
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/* zero EFLAGS after setting rsp */
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pushq $0
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popfq
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/*
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* We must switch to a new descriptor in kernel space for the GDT
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* because soon the kernel won't have access anymore to the userspace
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* addresses where we're currently running on. We have to do that here
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* because in 32bit we couldn't load a 64bit linear address.
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*/
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lgdt early_gdt_descr(%rip)
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/* set up data segments */
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xorl %eax,%eax
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movl %eax,%ds
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movl %eax,%ss
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movl %eax,%es
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/*
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* We don't really need to load %fs or %gs, but load them anyway
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* to kill any stale realmode selectors. This allows execution
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* under VT hardware.
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*/
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movl %eax,%fs
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movl %eax,%gs
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/* Set up %gs.
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*
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* The base of %gs always points to the bottom of the irqstack
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* union. If the stack protector canary is enabled, it is
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* located at %gs:40. Note that, on SMP, the boot cpu uses
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* init data section till per cpu areas are set up.
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*/
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movl $MSR_GS_BASE,%ecx
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movl initial_gs(%rip),%eax
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movl initial_gs+4(%rip),%edx
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wrmsr
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/* esi is pointer to real mode structure with interesting info.
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pass it to C */
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movl %esi, %edi
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/* Finally jump to run C code and to be on real kernel address
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* Since we are running on identity-mapped space we have to jump
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* to the full 64bit address, this is only possible as indirect
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* jump. In addition we need to ensure %cs is set so we make this
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* a far return.
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*/
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movq initial_code(%rip),%rax
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pushq $0 # fake return address to stop unwinder
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pushq $__KERNEL_CS # set correct cs
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pushq %rax # target address in negative space
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lretq
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/* SMP bootup changes these two */
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__REFDATA
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.align 8
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ENTRY(initial_code)
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.quad x86_64_start_kernel
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ENTRY(initial_gs)
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.quad INIT_PER_CPU_VAR(irq_stack_union)
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ENTRY(stack_start)
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.quad init_thread_union+THREAD_SIZE-8
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.word 0
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__FINITDATA
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bad_address:
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jmp bad_address
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.section ".init.text","ax"
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.globl early_idt_handlers
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early_idt_handlers:
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# 104(%rsp) %rflags
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# 96(%rsp) %cs
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# 88(%rsp) %rip
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# 80(%rsp) error code
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i = 0
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.rept NUM_EXCEPTION_VECTORS
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.if (EXCEPTION_ERRCODE_MASK >> i) & 1
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ASM_NOP2
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.else
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pushq $0 # Dummy error code, to make stack frame uniform
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.endif
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pushq $i # 72(%rsp) Vector number
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jmp early_idt_handler
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i = i + 1
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.endr
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ENTRY(early_idt_handler)
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cld
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cmpl $2,early_recursion_flag(%rip)
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jz 1f
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incl early_recursion_flag(%rip)
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pushq %rax # 64(%rsp)
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pushq %rcx # 56(%rsp)
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pushq %rdx # 48(%rsp)
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pushq %rsi # 40(%rsp)
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pushq %rdi # 32(%rsp)
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pushq %r8 # 24(%rsp)
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pushq %r9 # 16(%rsp)
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pushq %r10 # 8(%rsp)
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pushq %r11 # 0(%rsp)
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cmpl $__KERNEL_CS,96(%rsp)
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jne 10f
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leaq 88(%rsp),%rdi # Pointer to %rip
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call early_fixup_exception
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andl %eax,%eax
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jnz 20f # Found an exception entry
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10:
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#ifdef CONFIG_EARLY_PRINTK
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GET_CR2_INTO(%r9) # can clobber any volatile register if pv
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movl 80(%rsp),%r8d # error code
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movl 72(%rsp),%esi # vector number
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movl 96(%rsp),%edx # %cs
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movq 88(%rsp),%rcx # %rip
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xorl %eax,%eax
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leaq early_idt_msg(%rip),%rdi
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call early_printk
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cmpl $2,early_recursion_flag(%rip)
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jz 1f
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call dump_stack
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#ifdef CONFIG_KALLSYMS
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leaq early_idt_ripmsg(%rip),%rdi
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movq 40(%rsp),%rsi # %rip again
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call __print_symbol
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#endif
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#endif /* EARLY_PRINTK */
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1: hlt
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jmp 1b
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20: # Exception table entry found
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popq %r11
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popq %r10
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popq %r9
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popq %r8
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popq %rdi
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popq %rsi
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popq %rdx
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popq %rcx
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popq %rax
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addq $16,%rsp # drop vector number and error code
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decl early_recursion_flag(%rip)
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INTERRUPT_RETURN
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.balign 4
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early_recursion_flag:
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.long 0
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#ifdef CONFIG_EARLY_PRINTK
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early_idt_msg:
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.asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n"
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early_idt_ripmsg:
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.asciz "RIP %s\n"
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#endif /* CONFIG_EARLY_PRINTK */
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.previous
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#define NEXT_PAGE(name) \
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.balign PAGE_SIZE; \
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ENTRY(name)
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/* Automate the creation of 1 to 1 mapping pmd entries */
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#define PMDS(START, PERM, COUNT) \
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i = 0 ; \
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.rept (COUNT) ; \
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.quad (START) + (i << PMD_SHIFT) + (PERM) ; \
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i = i + 1 ; \
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.endr
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.data
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/*
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* This default setting generates an ident mapping at address 0x100000
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* and a mapping for the kernel that precisely maps virtual address
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* 0xffffffff80000000 to physical address 0x000000. (always using
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* 2Mbyte large pages provided by PAE mode)
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*/
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NEXT_PAGE(init_level4_pgt)
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.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
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.org init_level4_pgt + L4_PAGE_OFFSET*8, 0
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.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
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.org init_level4_pgt + L4_START_KERNEL*8, 0
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/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
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.quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
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NEXT_PAGE(level3_ident_pgt)
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.quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
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.fill 511,8,0
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NEXT_PAGE(level3_kernel_pgt)
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.fill L3_START_KERNEL,8,0
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/* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
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.quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
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.quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
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NEXT_PAGE(level2_fixmap_pgt)
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.fill 506,8,0
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.quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
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/* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
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.fill 5,8,0
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NEXT_PAGE(level1_fixmap_pgt)
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.fill 512,8,0
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NEXT_PAGE(level2_ident_pgt)
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/* Since I easily can, map the first 1G.
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* Don't set NX because code runs from these pages.
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*/
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PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
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NEXT_PAGE(level2_kernel_pgt)
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/*
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* 512 MB kernel mapping. We spend a full page on this pagetable
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* anyway.
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*
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* The kernel code+data+bss must not be bigger than that.
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*
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* (NOTE: at +512MB starts the module area, see MODULES_VADDR.
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* If you want to increase this then increase MODULES_VADDR
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* too.)
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*/
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PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
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KERNEL_IMAGE_SIZE/PMD_SIZE)
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NEXT_PAGE(level2_spare_pgt)
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.fill 512, 8, 0
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#undef PMDS
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#undef NEXT_PAGE
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.data
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.align 16
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.globl early_gdt_descr
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early_gdt_descr:
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.word GDT_ENTRIES*8-1
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early_gdt_descr_base:
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.quad INIT_PER_CPU_VAR(gdt_page)
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ENTRY(phys_base)
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/* This must match the first entry in level2_kernel_pgt */
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.quad 0x0000000000000000
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#include "../../x86/xen/xen-head.S"
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.section .bss, "aw", @nobits
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.align L1_CACHE_BYTES
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ENTRY(idt_table)
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.skip IDT_ENTRIES * 16
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.align L1_CACHE_BYTES
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ENTRY(nmi_idt_table)
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.skip IDT_ENTRIES * 16
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__PAGE_ALIGNED_BSS
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.align PAGE_SIZE
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ENTRY(empty_zero_page)
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.skip PAGE_SIZE
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