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dcfec3c098
This adds the ROM script addresses for i.MX25, i.MX5x and i.MX6 to the SDMA driver needed for the driver to work without additional firmware. The ROM script addresses are SoC specific and in some cases even tapeout specific. This patch adds the ROM script addresses only for SoCs which do not have a tapeout specific SDMA ROM, because currently it's unclear how this case should be handled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
79 lines
1.9 KiB
Plaintext
79 lines
1.9 KiB
Plaintext
* Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
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Required properties:
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- compatible : Should be "fsl,imx31-sdma", "fsl,imx31-to1-sdma",
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"fsl,imx31-to2-sdma", "fsl,imx35-sdma", "fsl,imx35-to1-sdma",
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"fsl,imx35-to2-sdma", "fsl,imx51-sdma", "fsl,imx53-sdma" or
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"fsl,imx6q-sdma". The -to variants should be preferred since they
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allow to determnine the correct ROM script addresses needed for
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the driver to work without additional firmware.
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- reg : Should contain SDMA registers location and length
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- interrupts : Should contain SDMA interrupt
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- #dma-cells : Must be <3>.
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The first cell specifies the DMA request/event ID. See details below
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about the second and third cell.
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- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM
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scripts firmware
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The second cell of dma phandle specifies the peripheral type of DMA transfer.
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The full ID of peripheral types can be found below.
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ID transfer type
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---------------------
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0 MCU domain SSI
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1 Shared SSI
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2 MMC
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3 SDHC
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4 MCU domain UART
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5 Shared UART
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6 FIRI
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7 MCU domain CSPI
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8 Shared CSPI
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9 SIM
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10 ATA
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11 CCM
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12 External peripheral
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13 Memory Stick Host Controller
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14 Shared Memory Stick Host Controller
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15 DSP
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16 Memory
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17 FIFO type Memory
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18 SPDIF
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19 IPU Memory
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20 ASRC
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21 ESAI
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The third cell specifies the transfer priority as below.
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ID transfer priority
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-------------------------
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0 High
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1 Medium
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2 Low
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Examples:
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sdma@83fb0000 {
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compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
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reg = <0x83fb0000 0x4000>;
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interrupts = <6>;
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#dma-cells = <3>;
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fsl,sdma-ram-script-name = "sdma-imx51.bin";
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};
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DMA clients connected to the i.MX SDMA controller must use the format
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described in the dma.txt file.
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Examples:
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ssi2: ssi@70014000 {
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compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
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reg = <0x70014000 0x4000>;
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interrupts = <30>;
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clocks = <&clks 49>;
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dmas = <&sdma 24 1 0>,
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<&sdma 25 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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};
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