mirror of
https://github.com/torvalds/linux.git
synced 2024-12-26 04:42:12 +00:00
ecc6cd73b7
This patch alters the bootwrapper for a number of machines (roubhly all 4xx based cuboot or treeboot platforms) to use aliases instead of the linux,network-index hack to work out which MAC address to attach to which ethernet device node. The now obsolete linux,network-index properties are removed from the corresponding device trees. This won't break backwards compatiblity, because in cases where this fixup code is relevant, the device tree is part of the kernel image. The references to linux,network-index are removed from booting-without-of.txt. Not only is it now deprecated, but as a hack applicable only when the device tree blob and fixup code were in the same image, this property never belonged in booting-without-of.txt which describes the interface between the kernel and firmware or bootloaders which produce a device tree. By the time the device tree reaches the kernel, all the MAC addresses must be fully filled in. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
245 lines
5.2 KiB
Plaintext
245 lines
5.2 KiB
Plaintext
/*
|
|
* Device Tree Source for IBM Walnut
|
|
*
|
|
* Copyright 2007 IBM Corp.
|
|
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without
|
|
* any warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
model = "ibm,walnut";
|
|
compatible = "ibm,walnut";
|
|
dcr-parent = <&/cpus/cpu@0>;
|
|
|
|
aliases {
|
|
ethernet0 = &EMAC;
|
|
serial0 = &UART0;
|
|
serial1 = &UART1;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
model = "PowerPC,405GP";
|
|
reg = <0>;
|
|
clock-frequency = <bebc200>; /* Filled in by zImage */
|
|
timebase-frequency = <0>; /* Filled in by zImage */
|
|
i-cache-line-size = <20>;
|
|
d-cache-line-size = <20>;
|
|
i-cache-size = <4000>;
|
|
d-cache-size = <4000>;
|
|
dcr-controller;
|
|
dcr-access-method = "native";
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0 0>; /* Filled in by zImage */
|
|
};
|
|
|
|
UIC0: interrupt-controller {
|
|
compatible = "ibm,uic";
|
|
interrupt-controller;
|
|
cell-index = <0>;
|
|
dcr-reg = <0c0 9>;
|
|
#address-cells = <0>;
|
|
#size-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
plb {
|
|
compatible = "ibm,plb3";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
clock-frequency = <0>; /* Filled in by zImage */
|
|
|
|
SDRAM0: memory-controller {
|
|
compatible = "ibm,sdram-405gp";
|
|
dcr-reg = <010 2>;
|
|
};
|
|
|
|
MAL: mcmal {
|
|
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
|
|
dcr-reg = <180 62>;
|
|
num-tx-chans = <1>;
|
|
num-rx-chans = <1>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <
|
|
b 4 /* TXEOB */
|
|
c 4 /* RXEOB */
|
|
a 4 /* SERR */
|
|
d 4 /* TXDE */
|
|
e 4 /* RXDE */>;
|
|
};
|
|
|
|
POB0: opb {
|
|
compatible = "ibm,opb-405gp", "ibm,opb";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <ef600000 ef600000 a00000>;
|
|
dcr-reg = <0a0 5>;
|
|
clock-frequency = <0>; /* Filled in by zImage */
|
|
|
|
UART0: serial@ef600300 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <ef600300 8>;
|
|
virtual-reg = <ef600300>;
|
|
clock-frequency = <0>; /* Filled in by zImage */
|
|
current-speed = <2580>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <0 4>;
|
|
};
|
|
|
|
UART1: serial@ef600400 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <ef600400 8>;
|
|
virtual-reg = <ef600400>;
|
|
clock-frequency = <0>; /* Filled in by zImage */
|
|
current-speed = <2580>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <1 4>;
|
|
};
|
|
|
|
IIC: i2c@ef600500 {
|
|
compatible = "ibm,iic-405gp", "ibm,iic";
|
|
reg = <ef600500 11>;
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <2 4>;
|
|
};
|
|
|
|
GPIO: gpio@ef600700 {
|
|
compatible = "ibm,gpio-405gp";
|
|
reg = <ef600700 20>;
|
|
};
|
|
|
|
EMAC: ethernet@ef600800 {
|
|
device_type = "network";
|
|
compatible = "ibm,emac-405gp", "ibm,emac";
|
|
interrupt-parent = <&UIC0>;
|
|
interrupts = <
|
|
f 4 /* Ethernet */
|
|
9 4 /* Ethernet Wake Up */>;
|
|
local-mac-address = [000000000000]; /* Filled in by zImage */
|
|
reg = <ef600800 70>;
|
|
mal-device = <&MAL>;
|
|
mal-tx-channel = <0>;
|
|
mal-rx-channel = <0>;
|
|
cell-index = <0>;
|
|
max-frame-size = <5dc>;
|
|
rx-fifo-size = <1000>;
|
|
tx-fifo-size = <800>;
|
|
phy-mode = "rmii";
|
|
phy-map = <00000001>;
|
|
};
|
|
|
|
};
|
|
|
|
EBC0: ebc {
|
|
compatible = "ibm,ebc-405gp", "ibm,ebc";
|
|
dcr-reg = <012 2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
/* The ranges property is supplied by the bootwrapper
|
|
* and is based on the firmware's configuration of the
|
|
* EBC bridge
|
|
*/
|
|
clock-frequency = <0>; /* Filled in by zImage */
|
|
|
|
sram@0,0 {
|
|
reg = <0 0 80000>;
|
|
};
|
|
|
|
flash@0,80000 {
|
|
compatible = "jedec-flash";
|
|
bank-width = <1>;
|
|
reg = <0 80000 80000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
partition@0 {
|
|
label = "OpenBIOS";
|
|
reg = <0 80000>;
|
|
read-only;
|
|
};
|
|
};
|
|
|
|
nvram@1,0 {
|
|
/* NVRAM and RTC */
|
|
compatible = "ds1743-nvram";
|
|
#bytes = <2000>;
|
|
reg = <1 0 2000>;
|
|
};
|
|
|
|
keyboard@2,0 {
|
|
compatible = "intel,82C42PC";
|
|
reg = <2 0 2>;
|
|
};
|
|
|
|
ir@3,0 {
|
|
compatible = "ti,TIR2000PAG";
|
|
reg = <3 0 10>;
|
|
};
|
|
|
|
fpga@7,0 {
|
|
compatible = "Walnut-FPGA";
|
|
reg = <7 0 10>;
|
|
virtual-reg = <f0300005>;
|
|
};
|
|
};
|
|
|
|
PCI0: pci@ec000000 {
|
|
device_type = "pci";
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
|
|
primary;
|
|
reg = <eec00000 8 /* Config space access */
|
|
eed80000 4 /* IACK */
|
|
eed80000 4 /* Special cycle */
|
|
ef480000 40>; /* Internal registers */
|
|
|
|
/* Outbound ranges, one memory and one IO,
|
|
* later cannot be changed. Chip supports a second
|
|
* IO range but we don't use it for now
|
|
*/
|
|
ranges = <02000000 0 80000000 80000000 0 20000000
|
|
01000000 0 00000000 e8000000 0 00010000>;
|
|
|
|
/* Inbound 2GB range starting at 0 */
|
|
dma-ranges = <42000000 0 0 0 0 80000000>;
|
|
|
|
/* Walnut has all 4 IRQ pins tied together per slot */
|
|
interrupt-map-mask = <f800 0 0 0>;
|
|
interrupt-map = <
|
|
/* IDSEL 1 */
|
|
0800 0 0 0 &UIC0 1c 8
|
|
|
|
/* IDSEL 2 */
|
|
1000 0 0 0 &UIC0 1d 8
|
|
|
|
/* IDSEL 3 */
|
|
1800 0 0 0 &UIC0 1e 8
|
|
|
|
/* IDSEL 4 */
|
|
2000 0 0 0 &UIC0 1f 8
|
|
>;
|
|
};
|
|
};
|
|
|
|
chosen {
|
|
linux,stdout-path = "/plb/opb/serial@ef600300";
|
|
};
|
|
};
|