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The Tegra PPSB (an peripheral bus) queues writes transactions. In order to guarantee that writes have completed before a certain time, a read transaction to a register on the same bus must be executed. This is necessary in situations such as when clearing an interrupt status or enable, so that when returning from an interrupt handler, the HW has already de-asserted its interrupt status output, which will avoid spurious interrupts. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> |
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| algos | ||
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| i2c-boardinfo.c | ||
| i2c-core.c | ||
| i2c-core.h | ||
| i2c-dev.c | ||
| i2c-mux.c | ||
| i2c-smbus.c | ||
| Kconfig | ||
| Makefile | ||