linux/drivers/pci
Mika Westerberg ec411e02b7 PCI/PM: Assume ports without DLL Link Active train links in 100 ms
Kai-Heng Feng reported that it takes a long time (> 1 s) to resume
Thunderbolt-connected devices from both runtime suspend and system sleep
(s2idle).

This was because some Downstream Ports that support > 5 GT/s do not also
support Data Link Layer Link Active reporting.  Per PCIe r5.0 sec 6.6.1:

  With a Downstream Port that supports Link speeds greater than 5.0 GT/s,
  software must wait a minimum of 100 ms after Link training completes
  before sending a Configuration Request to the device immediately below
  that Port. Software can determine when Link training completes by polling
  the Data Link Layer Link Active bit or by setting up an associated
  interrupt (see Section 6.7.3.3).

Sec 7.5.3.6 requires such Ports to support DLL Link Active reporting, but
at least the Intel JHL6240 Thunderbolt 3 Bridge [8086:15c0] and the Intel
JHL7540 Thunderbolt 3 Bridge [8086:15ea] do not.

Previously we tried to wait for Link training to complete, but since there
was no DLL Link Active reporting, all we could do was wait the worst-case
1000 ms, then another 100 ms.

Instead of using the supported speeds to determine whether to wait for Link
training, check whether the port supports DLL Link Active reporting.  The
Ports in question do not, so we'll wait only the 100 ms required for Ports
that support Link speeds <= 5 GT/s.

This of course assumes these Ports always train the Link within 100 ms even
if they are operating at > 5 GT/s, which is not required by the spec.

[bhelgaas: commit log, comment]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206837
Link: https://lore.kernel.org/r/20200514133043.27429-1-mika.westerberg@linux.intel.com
Reported-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-05-15 15:52:01 -05:00
..
controller pci-v5.7-changes 2020-04-03 14:25:02 -07:00
endpoint PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address 2020-04-02 17:57:10 +01:00
hotplug powerpc updates for 5.7 2020-04-05 11:12:59 -07:00
pcie pci-v5.7-changes 2020-04-03 14:25:02 -07:00
switch pci/switchtec: Replace completion wait queue usage for poll 2020-03-21 16:00:20 +01:00
access.c PCI/AER: Save AER Capability for suspend/resume 2019-10-18 17:05:42 -05:00
ats.c PCI/ATS: Export symbols of PASID functions 2020-03-18 21:32:25 +00:00
bus.c PCI: Unexport pci_bus_get() and pci_bus_put() 2019-07-23 18:32:49 -05:00
ecam.c
host-bridge.c
iov.c PCI/IOV: Fix memory leak in pci_iov_add_virtfn() 2019-12-09 15:51:32 -06:00
irq.c
Kconfig Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
Makefile PCI: Allow building PCIe things without PCIEPORTBUS 2019-11-21 07:52:33 -06:00
mmap.c PCI: Fix typos and whitespace errors 2019-07-09 07:24:53 -05:00
msi.c remove ioremap_nocache and devm_ioremap_nocache 2020-01-06 09:45:59 +01:00
of.c PCI: Make devm_of_pci_get_host_bridge_resources() static 2019-11-20 17:00:14 +00:00
p2pdma.c PCI/P2PDMA: Add Intel Sky Lake-E Root Ports B, C, D to the whitelist 2020-03-18 18:09:07 -05:00
pci-acpi.c Merge branch 'pci/misc' 2020-04-02 14:26:38 -05:00
pci-bridge-emul.c PCI: pci-bridge-emul: Use new constant PCI_STATUS_ERROR_BITS 2020-03-04 14:21:00 -08:00
pci-bridge-emul.h PCI: pci-bridge-emul: Fix big-endian support 2019-10-17 12:42:48 +01:00
pci-driver.c PCI/PM: Add missing link delays required by the PCIe spec 2019-11-20 17:37:24 -06:00
pci-label.c
pci-mid.c PCI: intel-mid: Convert to new X86 CPU match macros 2020-03-24 21:35:06 +01:00
pci-pf-stub.c PCI: Fix typos and whitespace errors 2019-07-09 07:24:53 -05:00
pci-stub.c
pci-sysfs.c Merge branch 'pci/misc' 2020-04-02 14:26:38 -05:00
pci.c PCI/PM: Assume ports without DLL Link Active train links in 100 ms 2020-05-15 15:52:01 -05:00
pci.h Merge branch 'pci/enumeration' 2020-04-02 14:26:32 -05:00
probe.c Merge branch 'pci/enumeration' 2020-04-02 14:26:32 -05:00
proc.c proc: convert everything to "struct proc_ops" 2020-02-04 03:05:26 +00:00
quirks.c PCI: Avoid Pericom USB controller OHCI/EHCI PME# defect 2020-05-08 16:54:21 -05:00
remove.c
rom.c PCI: Use ioremap(), not phys_to_virt() for platform ROM 2020-03-30 09:52:23 -05:00
search.c Merge branch 'pci/host-vmd' 2020-01-29 17:00:02 -06:00
setup-bus.c PCI: Add support for root bus sizing 2020-03-30 09:52:34 -05:00
setup-irq.c
setup-res.c
slot.c PCI: Add pci_speed_string() 2020-03-10 14:05:33 -05:00
syscall.c PCI: Lock down BAR access when the kernel is locked down 2019-08-19 21:54:15 -07:00
vc.c Merge branch 'pci/trivial' 2019-09-23 16:10:31 -05:00
vpd.c PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port 2019-09-16 14:10:09 +01:00
xen-pcifront.c Merge branch 'pci/printk' 2019-05-13 18:34:46 -05:00