Iwona Winiarska aba59ce109 peci: aspeed: Clear clock_divider value before setting it ... PECI clock divider is programmed on 10:8 bits of PECI Control register. Before setting a new value, clear bits read from hardware. Reviewed-by: Billy Tsai <billy_tsai@aspeedtech.com> Link: https://lore.kernel.org/r/20240417134849.5793-1-iwona.winiarska@intel.com Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>		2024-06-17 15:18:29 +02:00
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controller	peci: aspeed: Clear clock_divider value before setting it	2024-06-17 15:18:29 +02:00
core.c	peci, hwmon: Switch to new Intel CPU model defines	2024-06-17 15:15:46 +02:00
cpu.c	peci, hwmon: Switch to new Intel CPU model defines	2024-06-17 15:15:46 +02:00
device.c	peci, hwmon: Switch to new Intel CPU model defines	2024-06-17 15:15:46 +02:00
internal.h	peci, hwmon: Switch to new Intel CPU model defines	2024-06-17 15:15:46 +02:00
Kconfig	peci: Add peci-cpu driver	2022-02-09 08:04:44 +01:00
Makefile	peci: Add peci-cpu driver	2022-02-09 08:04:44 +01:00
request.c	peci: Add peci-cpu driver	2022-02-09 08:04:44 +01:00
sysfs.c	driver core: bus: mark the struct bus_type for sysfs callbacks as constant	2023-03-23 13:20:40 +01:00