mirror of
https://github.com/torvalds/linux.git
synced 2024-11-22 20:22:09 +00:00
4af4321861
Add documentation for the TRBE under trace/coresight. Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-doc@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> [ Split from the TRBE driver patch ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210405164307.1720226-20-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
39 lines
1.2 KiB
ReStructuredText
39 lines
1.2 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
|
|
|
|
==============================
|
|
Trace Buffer Extension (TRBE).
|
|
==============================
|
|
|
|
:Author: Anshuman Khandual <anshuman.khandual@arm.com>
|
|
:Date: November 2020
|
|
|
|
Hardware Description
|
|
--------------------
|
|
|
|
Trace Buffer Extension (TRBE) is a percpu hardware which captures in system
|
|
memory, CPU traces generated from a corresponding percpu tracing unit. This
|
|
gets plugged in as a coresight sink device because the corresponding trace
|
|
generators (ETE), are plugged in as source device.
|
|
|
|
The TRBE is not compliant to CoreSight architecture specifications, but is
|
|
driven via the CoreSight driver framework to support the ETE (which is
|
|
CoreSight compliant) integration.
|
|
|
|
Sysfs files and directories
|
|
---------------------------
|
|
|
|
The TRBE devices appear on the existing coresight bus alongside the other
|
|
coresight devices::
|
|
|
|
>$ ls /sys/bus/coresight/devices
|
|
trbe0 trbe1 trbe2 trbe3
|
|
|
|
The ``trbe<N>`` named TRBEs are associated with a CPU.::
|
|
|
|
>$ ls /sys/bus/coresight/devices/trbe0/
|
|
align flag
|
|
|
|
*Key file items are:-*
|
|
* ``align``: TRBE write pointer alignment
|
|
* ``flag``: TRBE updates memory with access and dirty flags
|