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dcd07be3ff
Add did_interrupt() function to check if a PHY port really caused an interrupt. This is needed in the case of shared PHY interrupt pin configuration to stop interrupt event processing for PHY ports which didn't cause an interrupt. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
594 lines
13 KiB
C
594 lines
13 KiB
C
/*
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* drivers/net/phy/marvell.c
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*
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* Driver for Marvell PHYs
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*
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* Author: Andy Fleming
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#define MII_M1011_IEVENT 0x13
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#define MII_M1011_IEVENT_CLEAR 0x0000
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#define MII_M1011_IMASK 0x12
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#define MII_M1011_IMASK_INIT 0x6400
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#define MII_M1011_IMASK_CLEAR 0x0000
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#define MII_M1011_PHY_SCR 0x10
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#define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
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#define MII_M1145_PHY_EXT_CR 0x14
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#define MII_M1145_RGMII_RX_DELAY 0x0080
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#define MII_M1145_RGMII_TX_DELAY 0x0002
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#define M1145_DEV_FLAGS_RESISTANCE 0x00000001
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#define MII_M1111_PHY_LED_CONTROL 0x18
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#define MII_M1111_PHY_LED_DIRECT 0x4100
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#define MII_M1111_PHY_LED_COMBINE 0x411c
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#define MII_M1111_PHY_EXT_CR 0x14
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#define MII_M1111_RX_DELAY 0x80
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#define MII_M1111_TX_DELAY 0x2
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#define MII_M1111_PHY_EXT_SR 0x1b
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#define MII_M1111_HWCFG_MODE_MASK 0xf
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#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
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#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
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#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
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#define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
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#define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
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#define MII_M1111_COPPER 0
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#define MII_M1111_FIBER 1
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#define MII_88E1121_PHY_LED_CTRL 16
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#define MII_88E1121_PHY_LED_PAGE 3
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#define MII_88E1121_PHY_LED_DEF 0x0030
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#define MII_88E1121_PHY_PAGE 22
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#define MII_M1011_PHY_STATUS 0x11
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#define MII_M1011_PHY_STATUS_1000 0x8000
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#define MII_M1011_PHY_STATUS_100 0x4000
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#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
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#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
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#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
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#define MII_M1011_PHY_STATUS_LINK 0x0400
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MODULE_DESCRIPTION("Marvell PHY driver");
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MODULE_AUTHOR("Andy Fleming");
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MODULE_LICENSE("GPL");
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static int marvell_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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/* Clear the interrupts by reading the reg */
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err = phy_read(phydev, MII_M1011_IEVENT);
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if (err < 0)
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return err;
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return 0;
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}
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static int marvell_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
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else
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err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
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return err;
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}
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static int marvell_config_aneg(struct phy_device *phydev)
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{
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int err;
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/* The Marvell PHY has an errata which requires
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* that certain registers get written in order
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* to restart autonegotiation */
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x1f);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x200c);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x5);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x100);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1011_PHY_SCR,
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MII_M1011_PHY_SCR_AUTO_CROSS);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
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MII_M1111_PHY_LED_DIRECT);
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if (err < 0)
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return err;
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err = genphy_config_aneg(phydev);
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return err;
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}
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static int m88e1121_config_aneg(struct phy_device *phydev)
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{
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int err, temp;
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1011_PHY_SCR,
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MII_M1011_PHY_SCR_AUTO_CROSS);
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if (err < 0)
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return err;
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temp = phy_read(phydev, MII_88E1121_PHY_PAGE);
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phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
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phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF);
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phy_write(phydev, MII_88E1121_PHY_PAGE, temp);
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err = genphy_config_aneg(phydev);
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return err;
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}
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static int m88e1111_config_init(struct phy_device *phydev)
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{
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int err;
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int temp;
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/* Enable Fiber/Copper auto selection */
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temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
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temp &= ~MII_M1111_HWCFG_FIBER_COPPER_AUTO;
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phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
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temp = phy_read(phydev, MII_BMCR);
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temp |= BMCR_RESET;
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phy_write(phydev, MII_BMCR, temp);
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if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
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(phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
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(phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
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(phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
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temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
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if (temp < 0)
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return temp;
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
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temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
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} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
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temp &= ~MII_M1111_TX_DELAY;
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temp |= MII_M1111_RX_DELAY;
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} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
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temp &= ~MII_M1111_RX_DELAY;
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temp |= MII_M1111_TX_DELAY;
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}
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err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
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if (err < 0)
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return err;
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temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
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if (temp < 0)
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return temp;
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temp &= ~(MII_M1111_HWCFG_MODE_MASK);
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if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
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temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
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else
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temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
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err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
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if (err < 0)
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return err;
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}
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if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
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temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
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if (temp < 0)
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return temp;
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temp &= ~(MII_M1111_HWCFG_MODE_MASK);
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temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
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err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
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if (err < 0)
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return err;
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}
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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return 0;
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}
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static int m88e1118_config_aneg(struct phy_device *phydev)
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{
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int err;
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1011_PHY_SCR,
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MII_M1011_PHY_SCR_AUTO_CROSS);
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if (err < 0)
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return err;
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err = genphy_config_aneg(phydev);
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return 0;
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}
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static int m88e1118_config_init(struct phy_device *phydev)
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{
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int err;
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/* Change address */
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err = phy_write(phydev, 0x16, 0x0002);
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if (err < 0)
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return err;
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/* Enable 1000 Mbit */
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err = phy_write(phydev, 0x15, 0x1070);
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if (err < 0)
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return err;
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/* Change address */
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err = phy_write(phydev, 0x16, 0x0003);
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if (err < 0)
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return err;
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/* Adjust LED Control */
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err = phy_write(phydev, 0x10, 0x021e);
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if (err < 0)
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return err;
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/* Reset address */
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err = phy_write(phydev, 0x16, 0x0);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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return 0;
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}
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static int m88e1145_config_init(struct phy_device *phydev)
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{
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int err;
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/* Take care of errata E0 & E1 */
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err = phy_write(phydev, 0x1d, 0x001b);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x418f);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x0016);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0xa2da);
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if (err < 0)
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return err;
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
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int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
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if (temp < 0)
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return temp;
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temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
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err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
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if (err < 0)
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return err;
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if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
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err = phy_write(phydev, 0x1d, 0x0012);
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if (err < 0)
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return err;
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temp = phy_read(phydev, 0x1e);
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if (temp < 0)
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return temp;
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temp &= 0xf03f;
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temp |= 2 << 9; /* 36 ohm */
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temp |= 2 << 6; /* 39 ohm */
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err = phy_write(phydev, 0x1e, temp);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x3);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x8000);
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if (err < 0)
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return err;
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}
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}
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return 0;
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}
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/* marvell_read_status
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*
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* Generic status code does not detect Fiber correctly!
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* Description:
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* Check the link, then figure out the current state
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* by comparing what we advertise with what the link partner
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* advertises. Start by checking the gigabit possibilities,
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* then move on to 10/100.
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*/
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static int marvell_read_status(struct phy_device *phydev)
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{
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int adv;
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int err;
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int lpa;
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int status = 0;
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/* Update the link, but return if there
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* was an error */
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err = genphy_update_link(phydev);
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if (err)
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return err;
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if (AUTONEG_ENABLE == phydev->autoneg) {
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status = phy_read(phydev, MII_M1011_PHY_STATUS);
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if (status < 0)
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return status;
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lpa = phy_read(phydev, MII_LPA);
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if (lpa < 0)
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return lpa;
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adv = phy_read(phydev, MII_ADVERTISE);
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if (adv < 0)
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return adv;
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lpa &= adv;
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if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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status = status & MII_M1011_PHY_STATUS_SPD_MASK;
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phydev->pause = phydev->asym_pause = 0;
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switch (status) {
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case MII_M1011_PHY_STATUS_1000:
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phydev->speed = SPEED_1000;
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break;
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case MII_M1011_PHY_STATUS_100:
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phydev->speed = SPEED_100;
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break;
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default:
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phydev->speed = SPEED_10;
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break;
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}
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if (phydev->duplex == DUPLEX_FULL) {
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phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
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phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
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}
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} else {
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int bmcr = phy_read(phydev, MII_BMCR);
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if (bmcr < 0)
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return bmcr;
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if (bmcr & BMCR_FULLDPLX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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if (bmcr & BMCR_SPEED1000)
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phydev->speed = SPEED_1000;
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else if (bmcr & BMCR_SPEED100)
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phydev->speed = SPEED_100;
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else
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phydev->speed = SPEED_10;
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phydev->pause = phydev->asym_pause = 0;
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}
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return 0;
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}
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static int m88e1121_did_interrupt(struct phy_device *phydev)
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{
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int imask;
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imask = phy_read(phydev, MII_M1011_IEVENT);
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if (imask & MII_M1011_IMASK_INIT)
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return 1;
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return 0;
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}
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static struct phy_driver marvell_drivers[] = {
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{
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.phy_id = 0x01410c60,
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.phy_id_mask = 0xfffffff0,
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.name = "Marvell 88E1101",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &marvell_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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.driver = { .owner = THIS_MODULE },
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},
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{
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.phy_id = 0x01410c90,
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.phy_id_mask = 0xfffffff0,
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.name = "Marvell 88E1112",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_init = &m88e1111_config_init,
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.config_aneg = &marvell_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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.driver = { .owner = THIS_MODULE },
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},
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{
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.phy_id = 0x01410cc0,
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.phy_id_mask = 0xfffffff0,
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.name = "Marvell 88E1111",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
|
|
.config_init = &m88e1111_config_init,
|
|
.config_aneg = &marvell_config_aneg,
|
|
.read_status = &marvell_read_status,
|
|
.ack_interrupt = &marvell_ack_interrupt,
|
|
.config_intr = &marvell_config_intr,
|
|
.driver = { .owner = THIS_MODULE },
|
|
},
|
|
{
|
|
.phy_id = 0x01410e10,
|
|
.phy_id_mask = 0xfffffff0,
|
|
.name = "Marvell 88E1118",
|
|
.features = PHY_GBIT_FEATURES,
|
|
.flags = PHY_HAS_INTERRUPT,
|
|
.config_init = &m88e1118_config_init,
|
|
.config_aneg = &m88e1118_config_aneg,
|
|
.read_status = &genphy_read_status,
|
|
.ack_interrupt = &marvell_ack_interrupt,
|
|
.config_intr = &marvell_config_intr,
|
|
.driver = {.owner = THIS_MODULE,},
|
|
},
|
|
{
|
|
.phy_id = 0x01410cb0,
|
|
.phy_id_mask = 0xfffffff0,
|
|
.name = "Marvell 88E1121R",
|
|
.features = PHY_GBIT_FEATURES,
|
|
.flags = PHY_HAS_INTERRUPT,
|
|
.config_aneg = &m88e1121_config_aneg,
|
|
.read_status = &marvell_read_status,
|
|
.ack_interrupt = &marvell_ack_interrupt,
|
|
.config_intr = &marvell_config_intr,
|
|
.did_interrupt = &m88e1121_did_interrupt,
|
|
.driver = { .owner = THIS_MODULE },
|
|
},
|
|
{
|
|
.phy_id = 0x01410cd0,
|
|
.phy_id_mask = 0xfffffff0,
|
|
.name = "Marvell 88E1145",
|
|
.features = PHY_GBIT_FEATURES,
|
|
.flags = PHY_HAS_INTERRUPT,
|
|
.config_init = &m88e1145_config_init,
|
|
.config_aneg = &marvell_config_aneg,
|
|
.read_status = &genphy_read_status,
|
|
.ack_interrupt = &marvell_ack_interrupt,
|
|
.config_intr = &marvell_config_intr,
|
|
.driver = { .owner = THIS_MODULE },
|
|
},
|
|
{
|
|
.phy_id = 0x01410e30,
|
|
.phy_id_mask = 0xfffffff0,
|
|
.name = "Marvell 88E1240",
|
|
.features = PHY_GBIT_FEATURES,
|
|
.flags = PHY_HAS_INTERRUPT,
|
|
.config_init = &m88e1111_config_init,
|
|
.config_aneg = &marvell_config_aneg,
|
|
.read_status = &genphy_read_status,
|
|
.ack_interrupt = &marvell_ack_interrupt,
|
|
.config_intr = &marvell_config_intr,
|
|
.driver = { .owner = THIS_MODULE },
|
|
},
|
|
};
|
|
|
|
static int __init marvell_init(void)
|
|
{
|
|
int ret;
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
|
|
ret = phy_driver_register(&marvell_drivers[i]);
|
|
|
|
if (ret) {
|
|
while (i-- > 0)
|
|
phy_driver_unregister(&marvell_drivers[i]);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit marvell_exit(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
|
|
phy_driver_unregister(&marvell_drivers[i]);
|
|
}
|
|
|
|
module_init(marvell_init);
|
|
module_exit(marvell_exit);
|