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d7add05458
When kvm_set_msr_common() handles a guest's write to MSR_IA32_TSC_ADJUST, it will calcuate an adjustment based on the data written by guest and then use it to adjust TSC offset by calling a call-back adjust_tsc_offset(). The 3rd parameter of adjust_tsc_offset() indicates whether the adjustment is in host TSC cycles or in guest TSC cycles. If SVM TSC scaling is enabled, adjust_tsc_offset() [i.e. svm_adjust_tsc_offset()] will first scale the adjustment; otherwise, it will just use the unscaled one. As the MSR write here comes from the guest, the adjustment is in guest TSC cycles. However, the current kvm_set_msr_common() uses it as a value in host TSC cycles (by using true as the 3rd parameter of adjust_tsc_offset()), which can result in an incorrect adjustment of TSC offset if SVM TSC scaling is enabled. This patch fixes this problem. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> Cc: stable@vger.linux.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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| .. | ||
| assigned-dev.c | ||
| assigned-dev.h | ||
| cpuid.c | ||
| cpuid.h | ||
| emulate.c | ||
| i8254.c | ||
| i8254.h | ||
| i8259.c | ||
| ioapic.c | ||
| ioapic.h | ||
| iommu.c | ||
| irq_comm.c | ||
| irq.c | ||
| irq.h | ||
| Kconfig | ||
| kvm_cache_regs.h | ||
| lapic.c | ||
| lapic.h | ||
| Makefile | ||
| mmu_audit.c | ||
| mmu.c | ||
| mmu.h | ||
| mmutrace.h | ||
| mtrr.c | ||
| paging_tmpl.h | ||
| pmu_amd.c | ||
| pmu_intel.c | ||
| pmu.c | ||
| pmu.h | ||
| svm.c | ||
| trace.h | ||
| tss.h | ||
| vmx.c | ||
| x86.c | ||
| x86.h | ||