Michael Turquette eaaa6fb53f Merge tag 'v4.5-rockchip-clk1_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next ... Rockchip clock changes for 4.5 containing - a new pll-type used on rk3036 and other Cortex-A7 socs - new clock-trees for rk3036 and rk3228 - switch rk3288 plls to slow mode on reboot - a bunch of new clock ids - some more critical clocks - wrong register offsets for the rk3368 cpuclks - allowing more than 2 parents for the cpuclk		2015-12-22 11:57:33 -08:00
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bindings	Merge tag 'v4.5-rockchip-clk1_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next	2015-12-22 11:57:33 -08:00
00-INDEX
booting-without-of.txt	ARM: 8354/1: Documentation: devicetree: root node serial-number property documentation	2015-05-08 10:42:34 +01:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt	Documentation: rename of_selftest.txt to of_unittest.txt	2015-03-25 00:50:53 -05:00
overlay-notes.txt	Documentation: devicetree: Fix double words in Doumentation/devicetree	2015-01-28 15:13:11 -07:00
todo.txt
usage-model.txt