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01687e7c93
There's a bunch of fixes/cleanups throughout the tree as usual, but we also have a handful of new features. * Various improvements to the extension detection and alternative patching infrastructure. * Zbb-optimized string routines. * Support for cpu-capacity in the RISC-V DT bindings. * Zicbom no longer depends on toolchain support. * Some performance and code size improvements to ftrace. * Support for ARCH_WANT_LD_ORPHAN_WARN. * Oops now contain the faulting instruction. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmP49coTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiTFnEACuQtGJWSwzH+ORswVyItKzqHcBMU3t rWHTFxQ7MdWgQO8nrWUtSypGY4n0DFTCe9w4H3tQFRDaTXbI+ycFjidEDt3eJCMb n6WiGuZpdKVS81CQ0Es4dTWQ1i/28fe1851CGK/PkybXdrPPofdCJ9k3Wepxflb/ 2UYxRDyjKt3KbJ2OmN2oF8Ek1rrsGhIC/Dhbdb2JsGZhYF10ZYjquaOLs31WbHMG O+n/N/JfZRAif1MDQ71ygAm9KV0kGqe/wcRtsJGETwJ8U3I/cjn2mAGd8BRdy4iL 9GFmTmi8q27ntUbakikNz3b4aE9xVnLDvRIyOciI3l8rQjrFAsfnQbuRwlaq6BVJ BF3e6nAjkcLj23FhbROTlfncEOzrklbNZ+uQIuvyffAUjDoePw9x7o0r+qj7FnOY WMfNecJMeE5OGVBqHSVFEcAMlN6uYu6wqbEipEpc+8sTg+w1LM0bUVNhV86/BrnL bh+4+7MPYtg45vy2Y8AuPUBFqR2uCekDpbxciCEGsaIzUYRas2zrt9UkWGjKs1VV q0qeLSNNA1wBq+q6FprTceipFQIqD5KnmI2GMucF6v4YFg5AzeSOpRc6aeqcs7Z2 +ApShSOFPjjntZbcpTgkvhrPExr0Jel0xY7YSazUUqY0xOHUwGNBEh/E4rzsRLxr qvUpFAIZT60dfQ== =XgYl -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: "There's a bunch of fixes/cleanups throughout the tree as usual, but we also have a handful of new features: - Various improvements to the extension detection and alternative patching infrastructure - Zbb-optimized string routines - Support for cpu-capacity in the RISC-V DT bindings - Zicbom no longer depends on toolchain support - Some performance and code size improvements to ftrace - Support for ARCH_WANT_LD_ORPHAN_WARN - Oops now contain the faulting instruction" * tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (67 commits) RISC-V: add a spin_shadow_stack declaration riscv: mm: hugetlb: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP riscv: Add header include guards to insn.h riscv: alternative: proceed one more instruction for auipc/jalr pair riscv: Avoid enabling interrupts in die() riscv, mm: Perform BPF exhandler fixup on page fault RISC-V: take text_mutex during alternative patching riscv: hwcap: Don't alphabetize ISA extension IDs RISC-V: fix ordering of Zbb extension riscv: jump_label: Fixup unaligned arch_static_branch function RISC-V: Only provide the single-letter extensions in HWCAP riscv: mm: fix regression due to update_mmu_cache change scripts/decodecode: Add support for RISC-V riscv: Add instruction dump to RISC-V splats riscv: select ARCH_WANT_LD_ORPHAN_WARN for !XIP_KERNEL riscv: vmlinux.lds.S: explicitly catch .init.bss sections from EFI stub riscv: vmlinux.lds.S: explicitly catch .riscv.attributes sections riscv: vmlinux.lds.S: explicitly catch .rela.dyn symbols riscv: lds: define RUNTIME_DISCARD_EXIT RISC-V: move some stray __RISCV_INSN_FUNCS definitions from kprobes ...
156 lines
2.8 KiB
ArmAsm
156 lines
2.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#define RO_EXCEPTION_TABLE_ALIGN 4
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#define RUNTIME_DISCARD_EXIT
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#ifdef CONFIG_XIP_KERNEL
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#include "vmlinux-xip.lds.S"
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#else
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#include <asm/pgtable.h>
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#define LOAD_OFFSET KERNEL_LINK_ADDR
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#include <asm/vmlinux.lds.h>
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/set_memory.h>
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#include "image-vars.h"
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#include <linux/sizes.h>
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OUTPUT_ARCH(riscv)
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ENTRY(_start)
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jiffies = jiffies_64;
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PECOFF_SECTION_ALIGNMENT = 0x1000;
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PECOFF_FILE_ALIGNMENT = 0x200;
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SECTIONS
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{
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/* Beginning of code and text segment */
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. = LOAD_OFFSET;
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_start = .;
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HEAD_TEXT_SECTION
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. = ALIGN(PAGE_SIZE);
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.text : {
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_text = .;
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_stext = .;
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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ENTRY_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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_etext = .;
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}
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. = ALIGN(SECTION_ALIGN);
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__init_begin = .;
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__init_text_begin = .;
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.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) ALIGN(SECTION_ALIGN) { \
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_sinittext = .; \
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INIT_TEXT \
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_einittext = .; \
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}
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. = ALIGN(8);
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__soc_early_init_table : {
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__soc_early_init_table_start = .;
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KEEP(*(__soc_early_init_table))
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__soc_early_init_table_end = .;
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}
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__soc_builtin_dtb_table : {
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__soc_builtin_dtb_table_start = .;
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KEEP(*(__soc_builtin_dtb_table))
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__soc_builtin_dtb_table_end = .;
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}
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/* we have to discard exit text and such at runtime, not link time */
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.exit.text :
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{
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EXIT_TEXT
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}
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__init_text_end = .;
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. = ALIGN(SECTION_ALIGN);
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#ifdef CONFIG_EFI
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. = ALIGN(PECOFF_SECTION_ALIGNMENT);
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__pecoff_text_end = .;
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#endif
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/* Start of init data section */
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__init_data_begin = .;
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INIT_DATA_SECTION(16)
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.init.bss : {
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*(.init.bss) /* from the EFI stub */
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}
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.exit.data :
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{
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EXIT_DATA
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}
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PERCPU_SECTION(L1_CACHE_BYTES)
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.rel.dyn : {
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*(.rel.dyn*)
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}
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.rela.dyn : {
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*(.rela*)
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}
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__init_data_end = .;
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. = ALIGN(8);
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.alternative : {
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__alt_start = .;
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*(.alternative)
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__alt_end = .;
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}
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__init_end = .;
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/* Start of data section */
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_sdata = .;
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RO_DATA(SECTION_ALIGN)
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.srodata : {
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*(.srodata*)
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}
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. = ALIGN(SECTION_ALIGN);
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_data = .;
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RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_ALIGN)
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.sdata : {
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__global_pointer$ = . + 0x800;
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*(.sdata*)
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}
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#ifdef CONFIG_EFI
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.pecoff_edata_padding : { BYTE(0); . = ALIGN(PECOFF_FILE_ALIGNMENT); }
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__pecoff_data_raw_size = ABSOLUTE(. - __pecoff_text_end);
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#endif
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/* End of data section */
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_edata = .;
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BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0)
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#ifdef CONFIG_EFI
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. = ALIGN(PECOFF_SECTION_ALIGNMENT);
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__pecoff_data_virt_size = ABSOLUTE(. - __pecoff_text_end);
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#endif
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_end = .;
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STABS_DEBUG
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DWARF_DEBUG
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ELF_DETAILS
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.riscv.attributes 0 : { *(.riscv.attributes) }
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DISCARDS
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}
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#endif /* CONFIG_XIP_KERNEL */
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