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e8b8318de6
Add a new compatible string "brcm,iproc-pcie-paxc", for PAXC-based iProc PCIe root complex. A PAXC-based PCIe root complex is connected to emulated endpoint devices internal to the ASIC. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Scott Branden <sbranden@broadcom.com>
87 lines
2.5 KiB
Plaintext
87 lines
2.5 KiB
Plaintext
* Broadcom iProc PCIe controller with the platform bus interface
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Required properties:
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- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc"
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for PAXC. PAXB-based root complex is used for external endpoint devices.
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PAXC-based root complex is connected to emulated endpoint devices
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internal to the ASIC
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- reg: base address and length of the PCIe controller I/O register space
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- #interrupt-cells: set to <1>
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- interrupt-map-mask and interrupt-map, standard PCI properties to define the
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mapping of the PCIe interface to interrupt numbers
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- linux,pci-domain: PCI domain ID. Should be unique for each host controller
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- bus-range: PCI bus numbers covered
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- #address-cells: set to <3>
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- #size-cells: set to <2>
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- device_type: set to "pci"
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- ranges: ranges for the PCI memory and I/O regions
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Optional properties:
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- phys: phandle of the PCIe PHY device
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- phy-names: must be "pcie-phy"
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- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done
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by the ASIC after power on reset. In this case, SW needs to configure it
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If the brcm,pcie-ob property is present, the following properties become
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effective:
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Required:
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- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal
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address used by the iProc PCIe core (not the PCIe address)
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- brcm,pcie-ob-window-size: The outbound address mapping window size (in MB)
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Optional:
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- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to
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increase the outbound window size
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Example:
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pcie0: pcie@18012000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18012000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x28000000 0 0x00010000
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0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
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phys = <&phy 0 5>;
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phy-names = "pcie-phy";
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brcm,pcie-ob;
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brcm,pcie-ob-oarr-size;
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brcm,pcie-ob-axi-offset = <0x00000000>;
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brcm,pcie-ob-window-size = <256>;
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};
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pcie1: pcie@18013000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18013000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
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linux,pci-domain = <1>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x48000000 0 0x00010000
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0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
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phys = <&phy 1 6>;
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phy-names = "pcie-phy";
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};
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