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There is a risk that a GPE method/handler may be invoked twice. Let's consider a case, both GPE0(RAW_HANDLER) and GPE1(_Exx) is triggered. =======================================+============================= IRQ handler (top-half) |IRQ polling =======================================+============================= acpi_ev_detect_gpe() | LOCK() | READ (GPE0-7 enable/status registers)| ^^^^^^^^^^^^ROOT CAUSE^^^^^^^^^^^^^^^| Walk GPE0 | UNLOCK() |LOCK() Invoke GPE0 RAW_HANDLER |READ (GPE1 enable/status bit) |acpi_ev_gpe_dispatch(irq=false) | CLEAR (GPE1 enable bit) | CLEAR (GPE1 status bit) LOCK() |UNLOCK() Walk GPE1 +============================= acpi_ev_gpe_dispatch(irq=true) |IRQ polling (defer) CLEAR (GPE1 enable bit) +============================= CLEAR (GPE1 status bit) |acpi_ev_async_execute_gpe_method() Walk others | Evaluate GPE1 _Exx fi | acpi_ev_async_enable_gpe() UNLOCK() | LOCK() =======================================+ SET (GPE enable bit) IRQ handler (bottom-half) | UNLOCK() =======================================+ acpi_ev_async_execute_gpe_method() | Evaluate GPE1 _Exx | acpi_ev_async_enable_gpe() | LOCK() | SET (GPE1 enable bit) | UNLOCK() | =======================================+============================= If acpi_ev_detect_gpe() is only invoked from the IRQ context, there won't be more than one _Lxx/_Exx evaluations for one status bit flagging if the IRQ handlers controlled by the underlying IRQ chip/driver (ex. APIC) are run in serial. Note that, this is a known potential gap and we had an approach, locking entire non-raw-handler processes in the top-half IRQ handler and handling all raw-handlers out of the locked loop to be friendly to those IRQ chip/driver. But the approach is too complicated while the issue is not so real, thus ACPICA treated such issue (if any) as a parallelism/quality issue of the underlying IRQ chip/driver to stop putting it on the radar. Bug in link #1 is suspiciously reflecting the same cause, and if so, it can also be fixed by this simpler approach. But it will be no excuse an ACPICA problem now if ACPICA starts to poll IRQs itself. In the changed scenario, _Exx will be evaluated from the task context due to new ACPICA provided "polling after enabling GPEs" mechanism. And the above figure uses edge-triggered GPEs demonstrating the possibility of evaluating _Exx twice for one status bit flagging. As a conclusion, there is now an increased chance of evaluating _Lxx/_Exx more than once for one status bit flagging. However this is still not a real problem if the _Lxx/_Exx checks the underlying hardware IRQ reasoning and finally just changes the 2nd and the follow-up evaluations into no-ops. Note that _Lxx should always be written in this way as a level-trigger GPE could have it's status wrongly duplicated by the underlying IRQ delivery mechanisms. But _Exx may have very low quality BIOS by BIOS to trigger real issues. For example, trigger duplicated button notifications. To solve this issue, we need to stop reading a bunch of enable/status register bits, but read only one GPE's enable/status bit. And GPE status register's W1C nature ensures that acknowledging one GPE won't affect another GPEs' status bits. Thus the hardware GPE architecture has already provided us with the mechanism of implementing such parallelism. So we can lock around one GPE handling process to achieve the parallelism: 1. If we can incorporate GPE enable bit check in detection and ensure the atomicity of the following process (top-half IRQ handler): READ (enable/status bit) if (enabled && raised) CLEAR (enable bit) and handle the GPE after this process, we can ensure that we will only invoke GPE handler once for one status bit flagging. 2. In addtion for edge-triggered GPEs, if we can ensure the atomicity of the following process (top-half IRQ handler): READ (enable/status bit) if (enabled && raised) CLEAR (enable bit) CLEAR (status bit) and handle the GPE after this process, we can ensure that we will only invoke GPE handler once for one status bit flagging. By doing a cleanup in this way, we can remove duplicate GPE handling code and ensure that all logics are collected in 1 function. And the function will be safe for both IRQ interrupt and IRQ polling, and will be safe for us to release and re-acquire acpi_gbl_gpe_lock at any time rather than raw handler only during the top-half IRQ handler. Lv Zheng. Link: https://bugzilla.kernel.org/show_bug.cgi?id=196703 [#1] Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
872 lines
25 KiB
C
872 lines
25 KiB
C
/******************************************************************************
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*
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* Module Name: evgpe - General Purpose Event handling and dispatch
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*
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*****************************************************************************/
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/*
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* Copyright (C) 2000 - 2018, Intel Corp.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <acpi/acpi.h>
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#include "accommon.h"
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#include "acevents.h"
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#include "acnamesp.h"
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#define _COMPONENT ACPI_EVENTS
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ACPI_MODULE_NAME("evgpe")
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#if (!ACPI_REDUCED_HARDWARE) /* Entire module */
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/* Local prototypes */
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static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context);
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static void ACPI_SYSTEM_XFACE acpi_ev_asynch_enable_gpe(void *context);
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_update_gpe_enable_mask
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*
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* PARAMETERS: gpe_event_info - GPE to update
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*
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* RETURN: Status
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*
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* DESCRIPTION: Updates GPE register enable mask based upon whether there are
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* runtime references to this GPE
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*
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******************************************************************************/
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acpi_status
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acpi_ev_update_gpe_enable_mask(struct acpi_gpe_event_info *gpe_event_info)
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{
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struct acpi_gpe_register_info *gpe_register_info;
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u32 register_bit;
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ACPI_FUNCTION_TRACE(ev_update_gpe_enable_mask);
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gpe_register_info = gpe_event_info->register_info;
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if (!gpe_register_info) {
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return_ACPI_STATUS(AE_NOT_EXIST);
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}
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register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
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/* Clear the run bit up front */
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ACPI_CLEAR_BIT(gpe_register_info->enable_for_run, register_bit);
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/* Set the mask bit only if there are references to this GPE */
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if (gpe_event_info->runtime_count) {
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ACPI_SET_BIT(gpe_register_info->enable_for_run,
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(u8)register_bit);
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}
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gpe_register_info->enable_mask = gpe_register_info->enable_for_run;
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return_ACPI_STATUS(AE_OK);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_enable_gpe
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*
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* PARAMETERS: gpe_event_info - GPE to enable
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*
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* RETURN: Status
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*
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* DESCRIPTION: Enable a GPE.
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*
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******************************************************************************/
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acpi_status acpi_ev_enable_gpe(struct acpi_gpe_event_info *gpe_event_info)
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{
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acpi_status status;
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ACPI_FUNCTION_TRACE(ev_enable_gpe);
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/* Enable the requested GPE */
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status = acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_ENABLE);
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return_ACPI_STATUS(status);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_mask_gpe
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*
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* PARAMETERS: gpe_event_info - GPE to be blocked/unblocked
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* is_masked - Whether the GPE is masked or not
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*
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* RETURN: Status
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*
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* DESCRIPTION: Unconditionally mask/unmask a GPE during runtime.
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*
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******************************************************************************/
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acpi_status
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acpi_ev_mask_gpe(struct acpi_gpe_event_info *gpe_event_info, u8 is_masked)
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{
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struct acpi_gpe_register_info *gpe_register_info;
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u32 register_bit;
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ACPI_FUNCTION_TRACE(ev_mask_gpe);
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gpe_register_info = gpe_event_info->register_info;
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if (!gpe_register_info) {
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return_ACPI_STATUS(AE_NOT_EXIST);
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}
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register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
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/* Perform the action */
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if (is_masked) {
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if (register_bit & gpe_register_info->mask_for_run) {
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return_ACPI_STATUS(AE_BAD_PARAMETER);
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}
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(void)acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_DISABLE);
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ACPI_SET_BIT(gpe_register_info->mask_for_run, (u8)register_bit);
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} else {
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if (!(register_bit & gpe_register_info->mask_for_run)) {
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return_ACPI_STATUS(AE_BAD_PARAMETER);
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}
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ACPI_CLEAR_BIT(gpe_register_info->mask_for_run,
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(u8)register_bit);
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if (gpe_event_info->runtime_count
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&& !gpe_event_info->disable_for_dispatch) {
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(void)acpi_hw_low_set_gpe(gpe_event_info,
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ACPI_GPE_ENABLE);
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}
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}
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return_ACPI_STATUS(AE_OK);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_add_gpe_reference
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*
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* PARAMETERS: gpe_event_info - Add a reference to this GPE
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*
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* RETURN: Status
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*
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* DESCRIPTION: Add a reference to a GPE. On the first reference, the GPE is
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* hardware-enabled.
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*
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******************************************************************************/
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acpi_status
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acpi_ev_add_gpe_reference(struct acpi_gpe_event_info *gpe_event_info)
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{
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acpi_status status = AE_OK;
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ACPI_FUNCTION_TRACE(ev_add_gpe_reference);
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if (gpe_event_info->runtime_count == ACPI_UINT8_MAX) {
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return_ACPI_STATUS(AE_LIMIT);
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}
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gpe_event_info->runtime_count++;
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if (gpe_event_info->runtime_count == 1) {
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/* Enable on first reference */
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status = acpi_ev_update_gpe_enable_mask(gpe_event_info);
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if (ACPI_SUCCESS(status)) {
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status = acpi_ev_enable_gpe(gpe_event_info);
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}
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if (ACPI_FAILURE(status)) {
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gpe_event_info->runtime_count--;
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}
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}
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return_ACPI_STATUS(status);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_remove_gpe_reference
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*
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* PARAMETERS: gpe_event_info - Remove a reference to this GPE
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*
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* RETURN: Status
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*
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* DESCRIPTION: Remove a reference to a GPE. When the last reference is
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* removed, the GPE is hardware-disabled.
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*
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******************************************************************************/
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acpi_status
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acpi_ev_remove_gpe_reference(struct acpi_gpe_event_info *gpe_event_info)
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{
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acpi_status status = AE_OK;
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ACPI_FUNCTION_TRACE(ev_remove_gpe_reference);
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if (!gpe_event_info->runtime_count) {
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return_ACPI_STATUS(AE_LIMIT);
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}
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gpe_event_info->runtime_count--;
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if (!gpe_event_info->runtime_count) {
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/* Disable on last reference */
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status = acpi_ev_update_gpe_enable_mask(gpe_event_info);
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if (ACPI_SUCCESS(status)) {
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status =
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acpi_hw_low_set_gpe(gpe_event_info,
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ACPI_GPE_DISABLE);
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}
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if (ACPI_FAILURE(status)) {
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gpe_event_info->runtime_count++;
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}
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}
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return_ACPI_STATUS(status);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_low_get_gpe_info
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*
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* PARAMETERS: gpe_number - Raw GPE number
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* gpe_block - A GPE info block
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*
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* RETURN: A GPE event_info struct. NULL if not a valid GPE (The gpe_number
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* is not within the specified GPE block)
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*
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* DESCRIPTION: Returns the event_info struct associated with this GPE. This is
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* the low-level implementation of ev_get_gpe_event_info.
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*
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******************************************************************************/
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struct acpi_gpe_event_info *acpi_ev_low_get_gpe_info(u32 gpe_number,
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struct acpi_gpe_block_info
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*gpe_block)
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{
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u32 gpe_index;
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/*
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* Validate that the gpe_number is within the specified gpe_block.
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* (Two steps)
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*/
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if (!gpe_block || (gpe_number < gpe_block->block_base_number)) {
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return (NULL);
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}
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gpe_index = gpe_number - gpe_block->block_base_number;
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if (gpe_index >= gpe_block->gpe_count) {
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return (NULL);
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}
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return (&gpe_block->event_info[gpe_index]);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_get_gpe_event_info
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*
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* PARAMETERS: gpe_device - Device node. NULL for GPE0/GPE1
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* gpe_number - Raw GPE number
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*
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* RETURN: A GPE event_info struct. NULL if not a valid GPE
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*
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* DESCRIPTION: Returns the event_info struct associated with this GPE.
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* Validates the gpe_block and the gpe_number
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*
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* Should be called only when the GPE lists are semaphore locked
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* and not subject to change.
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*
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******************************************************************************/
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struct acpi_gpe_event_info *acpi_ev_get_gpe_event_info(acpi_handle gpe_device,
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u32 gpe_number)
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{
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union acpi_operand_object *obj_desc;
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struct acpi_gpe_event_info *gpe_info;
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u32 i;
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ACPI_FUNCTION_ENTRY();
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/* A NULL gpe_device means use the FADT-defined GPE block(s) */
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if (!gpe_device) {
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/* Examine GPE Block 0 and 1 (These blocks are permanent) */
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for (i = 0; i < ACPI_MAX_GPE_BLOCKS; i++) {
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gpe_info = acpi_ev_low_get_gpe_info(gpe_number,
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acpi_gbl_gpe_fadt_blocks
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[i]);
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if (gpe_info) {
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return (gpe_info);
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}
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}
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/* The gpe_number was not in the range of either FADT GPE block */
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return (NULL);
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}
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/* A Non-NULL gpe_device means this is a GPE Block Device */
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obj_desc =
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acpi_ns_get_attached_object((struct acpi_namespace_node *)
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gpe_device);
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if (!obj_desc || !obj_desc->device.gpe_block) {
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return (NULL);
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}
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return (acpi_ev_low_get_gpe_info
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(gpe_number, obj_desc->device.gpe_block));
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_ev_gpe_detect
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*
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* PARAMETERS: gpe_xrupt_list - Interrupt block for this interrupt.
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* Can have multiple GPE blocks attached.
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*
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* RETURN: INTERRUPT_HANDLED or INTERRUPT_NOT_HANDLED
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*
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* DESCRIPTION: Detect if any GP events have occurred. This function is
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* executed at interrupt level.
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*
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******************************************************************************/
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u32 acpi_ev_gpe_detect(struct acpi_gpe_xrupt_info *gpe_xrupt_list)
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{
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struct acpi_gpe_block_info *gpe_block;
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struct acpi_namespace_node *gpe_device;
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struct acpi_gpe_register_info *gpe_register_info;
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struct acpi_gpe_event_info *gpe_event_info;
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u32 gpe_number;
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u32 int_status = ACPI_INTERRUPT_NOT_HANDLED;
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acpi_cpu_flags flags;
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u32 i;
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u32 j;
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ACPI_FUNCTION_NAME(ev_gpe_detect);
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/* Check for the case where there are no GPEs */
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if (!gpe_xrupt_list) {
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return (int_status);
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}
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/*
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* We need to obtain the GPE lock for both the data structs and registers
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* Note: Not necessary to obtain the hardware lock, since the GPE
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* registers are owned by the gpe_lock.
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*/
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flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
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/* Examine all GPE blocks attached to this interrupt level */
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gpe_block = gpe_xrupt_list->gpe_block_list_head;
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while (gpe_block) {
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gpe_device = gpe_block->node;
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/*
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* Read all of the 8-bit GPE status and enable registers in this GPE
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* block, saving all of them. Find all currently active GP events.
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*/
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for (i = 0; i < gpe_block->register_count; i++) {
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/* Get the next status/enable pair */
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gpe_register_info = &gpe_block->register_info[i];
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/*
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* Optimization: If there are no GPEs enabled within this
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* register, we can safely ignore the entire register.
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*/
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if (!(gpe_register_info->enable_for_run |
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gpe_register_info->enable_for_wake)) {
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ACPI_DEBUG_PRINT((ACPI_DB_INTERRUPTS,
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"Ignore disabled registers for GPE %02X-%02X: "
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"RunEnable=%02X, WakeEnable=%02X\n",
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gpe_register_info->
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base_gpe_number,
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gpe_register_info->
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base_gpe_number +
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(ACPI_GPE_REGISTER_WIDTH - 1),
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gpe_register_info->
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enable_for_run,
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gpe_register_info->
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enable_for_wake));
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continue;
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}
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/* Now look at the individual GPEs in this byte register */
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for (j = 0; j < ACPI_GPE_REGISTER_WIDTH; j++) {
|
|
|
|
/* Detect and dispatch one GPE bit */
|
|
|
|
gpe_event_info =
|
|
&gpe_block->
|
|
event_info[((acpi_size)i *
|
|
ACPI_GPE_REGISTER_WIDTH) + j];
|
|
gpe_number =
|
|
j + gpe_register_info->base_gpe_number;
|
|
acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
|
|
int_status |=
|
|
acpi_ev_detect_gpe(gpe_device,
|
|
gpe_event_info,
|
|
gpe_number);
|
|
flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
|
|
}
|
|
}
|
|
|
|
gpe_block = gpe_block->next;
|
|
}
|
|
|
|
acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
|
|
return (int_status);
|
|
}
|
|
|
|
/*******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_ev_asynch_execute_gpe_method
|
|
*
|
|
* PARAMETERS: Context (gpe_event_info) - Info for this GPE
|
|
*
|
|
* RETURN: None
|
|
*
|
|
* DESCRIPTION: Perform the actual execution of a GPE control method. This
|
|
* function is called from an invocation of acpi_os_execute and
|
|
* therefore does NOT execute at interrupt level - so that
|
|
* the control method itself is not executed in the context of
|
|
* an interrupt handler.
|
|
*
|
|
******************************************************************************/
|
|
|
|
static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
|
|
{
|
|
struct acpi_gpe_event_info *gpe_event_info = context;
|
|
acpi_status status = AE_OK;
|
|
struct acpi_evaluate_info *info;
|
|
struct acpi_gpe_notify_info *notify;
|
|
|
|
ACPI_FUNCTION_TRACE(ev_asynch_execute_gpe_method);
|
|
|
|
/* Do the correct dispatch - normal method or implicit notify */
|
|
|
|
switch (ACPI_GPE_DISPATCH_TYPE(gpe_event_info->flags)) {
|
|
case ACPI_GPE_DISPATCH_NOTIFY:
|
|
/*
|
|
* Implicit notify.
|
|
* Dispatch a DEVICE_WAKE notify to the appropriate handler.
|
|
* NOTE: the request is queued for execution after this method
|
|
* completes. The notify handlers are NOT invoked synchronously
|
|
* from this thread -- because handlers may in turn run other
|
|
* control methods.
|
|
*
|
|
* June 2012: Expand implicit notify mechanism to support
|
|
* notifies on multiple device objects.
|
|
*/
|
|
notify = gpe_event_info->dispatch.notify_list;
|
|
while (ACPI_SUCCESS(status) && notify) {
|
|
status =
|
|
acpi_ev_queue_notify_request(notify->device_node,
|
|
ACPI_NOTIFY_DEVICE_WAKE);
|
|
|
|
notify = notify->next;
|
|
}
|
|
|
|
break;
|
|
|
|
case ACPI_GPE_DISPATCH_METHOD:
|
|
|
|
/* Allocate the evaluation information block */
|
|
|
|
info = ACPI_ALLOCATE_ZEROED(sizeof(struct acpi_evaluate_info));
|
|
if (!info) {
|
|
status = AE_NO_MEMORY;
|
|
} else {
|
|
/*
|
|
* Invoke the GPE Method (_Lxx, _Exx) i.e., evaluate the
|
|
* _Lxx/_Exx control method that corresponds to this GPE
|
|
*/
|
|
info->prefix_node =
|
|
gpe_event_info->dispatch.method_node;
|
|
info->flags = ACPI_IGNORE_RETURN_VALUE;
|
|
|
|
status = acpi_ns_evaluate(info);
|
|
ACPI_FREE(info);
|
|
}
|
|
|
|
if (ACPI_FAILURE(status)) {
|
|
ACPI_EXCEPTION((AE_INFO, status,
|
|
"while evaluating GPE method [%4.4s]",
|
|
acpi_ut_get_node_name(gpe_event_info->
|
|
dispatch.
|
|
method_node)));
|
|
}
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error_exit; /* Should never happen */
|
|
}
|
|
|
|
/* Defer enabling of GPE until all notify handlers are done */
|
|
|
|
status = acpi_os_execute(OSL_NOTIFY_HANDLER,
|
|
acpi_ev_asynch_enable_gpe, gpe_event_info);
|
|
if (ACPI_SUCCESS(status)) {
|
|
return_VOID;
|
|
}
|
|
|
|
error_exit:
|
|
acpi_ev_asynch_enable_gpe(gpe_event_info);
|
|
return_VOID;
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_ev_asynch_enable_gpe
|
|
*
|
|
* PARAMETERS: Context (gpe_event_info) - Info for this GPE
|
|
* Callback from acpi_os_execute
|
|
*
|
|
* RETURN: None
|
|
*
|
|
* DESCRIPTION: Asynchronous clear/enable for GPE. This allows the GPE to
|
|
* complete (i.e., finish execution of Notify)
|
|
*
|
|
******************************************************************************/
|
|
|
|
static void ACPI_SYSTEM_XFACE acpi_ev_asynch_enable_gpe(void *context)
|
|
{
|
|
struct acpi_gpe_event_info *gpe_event_info = context;
|
|
acpi_cpu_flags flags;
|
|
|
|
flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
|
|
(void)acpi_ev_finish_gpe(gpe_event_info);
|
|
acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
|
|
|
|
return;
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_ev_finish_gpe
|
|
*
|
|
* PARAMETERS: gpe_event_info - Info for this GPE
|
|
*
|
|
* RETURN: Status
|
|
*
|
|
* DESCRIPTION: Clear/Enable a GPE. Common code that is used after execution
|
|
* of a GPE method or a synchronous or asynchronous GPE handler.
|
|
*
|
|
******************************************************************************/
|
|
|
|
acpi_status acpi_ev_finish_gpe(struct acpi_gpe_event_info *gpe_event_info)
|
|
{
|
|
acpi_status status;
|
|
|
|
if ((gpe_event_info->flags & ACPI_GPE_XRUPT_TYPE_MASK) ==
|
|
ACPI_GPE_LEVEL_TRIGGERED) {
|
|
/*
|
|
* GPE is level-triggered, we clear the GPE status bit after
|
|
* handling the event.
|
|
*/
|
|
status = acpi_hw_clear_gpe(gpe_event_info);
|
|
if (ACPI_FAILURE(status)) {
|
|
return (status);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Enable this GPE, conditionally. This means that the GPE will
|
|
* only be physically enabled if the enable_mask bit is set
|
|
* in the event_info.
|
|
*/
|
|
(void)acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_CONDITIONAL_ENABLE);
|
|
gpe_event_info->disable_for_dispatch = FALSE;
|
|
return (AE_OK);
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_ev_detect_gpe
|
|
*
|
|
* PARAMETERS: gpe_device - Device node. NULL for GPE0/GPE1
|
|
* gpe_event_info - Info for this GPE
|
|
* gpe_number - Number relative to the parent GPE block
|
|
*
|
|
* RETURN: INTERRUPT_HANDLED or INTERRUPT_NOT_HANDLED
|
|
*
|
|
* DESCRIPTION: Detect and dispatch a General Purpose Event to either a function
|
|
* (e.g. EC) or method (e.g. _Lxx/_Exx) handler.
|
|
* NOTE: GPE is W1C, so it is possible to handle a single GPE from both
|
|
* task and irq context in parallel as long as the process to
|
|
* detect and mask the GPE is atomic.
|
|
* However the atomicity of ACPI_GPE_DISPATCH_RAW_HANDLER is
|
|
* dependent on the raw handler itself.
|
|
*
|
|
******************************************************************************/
|
|
|
|
u32
|
|
acpi_ev_detect_gpe(struct acpi_namespace_node *gpe_device,
|
|
struct acpi_gpe_event_info *gpe_event_info, u32 gpe_number)
|
|
{
|
|
u32 int_status = ACPI_INTERRUPT_NOT_HANDLED;
|
|
u8 enabled_status_byte;
|
|
u64 status_reg;
|
|
u64 enable_reg;
|
|
u32 register_bit;
|
|
struct acpi_gpe_register_info *gpe_register_info;
|
|
struct acpi_gpe_handler_info *gpe_handler_info;
|
|
acpi_cpu_flags flags;
|
|
acpi_status status;
|
|
|
|
ACPI_FUNCTION_TRACE(ev_gpe_detect);
|
|
|
|
flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
|
|
|
|
/* Get the info block for the entire GPE register */
|
|
|
|
gpe_register_info = gpe_event_info->register_info;
|
|
|
|
/* Get the register bitmask for this GPE */
|
|
|
|
register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
|
|
|
|
/* GPE currently enabled (enable bit == 1)? */
|
|
|
|
status = acpi_hw_read(&enable_reg, &gpe_register_info->enable_address);
|
|
if (ACPI_FAILURE(status)) {
|
|
goto error_exit;
|
|
}
|
|
|
|
/* GPE currently active (status bit == 1)? */
|
|
|
|
status = acpi_hw_read(&status_reg, &gpe_register_info->status_address);
|
|
if (ACPI_FAILURE(status)) {
|
|
goto error_exit;
|
|
}
|
|
|
|
/* Check if there is anything active at all in this GPE */
|
|
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INTERRUPTS,
|
|
"Read registers for GPE %02X: Status=%02X, Enable=%02X, "
|
|
"RunEnable=%02X, WakeEnable=%02X\n",
|
|
gpe_number,
|
|
(u32)(status_reg & register_bit),
|
|
(u32)(enable_reg & register_bit),
|
|
gpe_register_info->enable_for_run,
|
|
gpe_register_info->enable_for_wake));
|
|
|
|
enabled_status_byte = (u8)(status_reg & enable_reg);
|
|
if (!(enabled_status_byte & register_bit)) {
|
|
goto error_exit;
|
|
}
|
|
|
|
/* Invoke global event handler if present */
|
|
|
|
acpi_gpe_count++;
|
|
if (acpi_gbl_global_event_handler) {
|
|
acpi_gbl_global_event_handler(ACPI_EVENT_TYPE_GPE,
|
|
gpe_device, gpe_number,
|
|
acpi_gbl_global_event_handler_context);
|
|
}
|
|
|
|
/* Found an active GPE */
|
|
|
|
if (ACPI_GPE_DISPATCH_TYPE(gpe_event_info->flags) ==
|
|
ACPI_GPE_DISPATCH_RAW_HANDLER) {
|
|
|
|
/* Dispatch the event to a raw handler */
|
|
|
|
gpe_handler_info = gpe_event_info->dispatch.handler;
|
|
|
|
/*
|
|
* There is no protection around the namespace node
|
|
* and the GPE handler to ensure a safe destruction
|
|
* because:
|
|
* 1. The namespace node is expected to always
|
|
* exist after loading a table.
|
|
* 2. The GPE handler is expected to be flushed by
|
|
* acpi_os_wait_events_complete() before the
|
|
* destruction.
|
|
*/
|
|
acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
|
|
int_status |=
|
|
gpe_handler_info->address(gpe_device, gpe_number,
|
|
gpe_handler_info->context);
|
|
flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
|
|
} else {
|
|
/* Dispatch the event to a standard handler or method. */
|
|
|
|
int_status |= acpi_ev_gpe_dispatch(gpe_device,
|
|
gpe_event_info, gpe_number);
|
|
}
|
|
|
|
error_exit:
|
|
acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
|
|
return (int_status);
|
|
}
|
|
|
|
/*******************************************************************************
|
|
*
|
|
* FUNCTION: acpi_ev_gpe_dispatch
|
|
*
|
|
* PARAMETERS: gpe_device - Device node. NULL for GPE0/GPE1
|
|
* gpe_event_info - Info for this GPE
|
|
* gpe_number - Number relative to the parent GPE block
|
|
*
|
|
* RETURN: INTERRUPT_HANDLED or INTERRUPT_NOT_HANDLED
|
|
*
|
|
* DESCRIPTION: Dispatch a General Purpose Event to either a function (e.g. EC)
|
|
* or method (e.g. _Lxx/_Exx) handler.
|
|
*
|
|
******************************************************************************/
|
|
|
|
u32
|
|
acpi_ev_gpe_dispatch(struct acpi_namespace_node *gpe_device,
|
|
struct acpi_gpe_event_info *gpe_event_info, u32 gpe_number)
|
|
{
|
|
acpi_status status;
|
|
u32 return_value;
|
|
|
|
ACPI_FUNCTION_TRACE(ev_gpe_dispatch);
|
|
|
|
/*
|
|
* Always disable the GPE so that it does not keep firing before
|
|
* any asynchronous activity completes (either from the execution
|
|
* of a GPE method or an asynchronous GPE handler.)
|
|
*
|
|
* If there is no handler or method to run, just disable the
|
|
* GPE and leave it disabled permanently to prevent further such
|
|
* pointless events from firing.
|
|
*/
|
|
status = acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_DISABLE);
|
|
if (ACPI_FAILURE(status)) {
|
|
ACPI_EXCEPTION((AE_INFO, status,
|
|
"Unable to disable GPE %02X", gpe_number));
|
|
return_UINT32(ACPI_INTERRUPT_NOT_HANDLED);
|
|
}
|
|
|
|
/*
|
|
* If edge-triggered, clear the GPE status bit now. Note that
|
|
* level-triggered events are cleared after the GPE is serviced.
|
|
*/
|
|
if ((gpe_event_info->flags & ACPI_GPE_XRUPT_TYPE_MASK) ==
|
|
ACPI_GPE_EDGE_TRIGGERED) {
|
|
status = acpi_hw_clear_gpe(gpe_event_info);
|
|
if (ACPI_FAILURE(status)) {
|
|
ACPI_EXCEPTION((AE_INFO, status,
|
|
"Unable to clear GPE %02X",
|
|
gpe_number));
|
|
(void)acpi_hw_low_set_gpe(gpe_event_info,
|
|
ACPI_GPE_CONDITIONAL_ENABLE);
|
|
return_UINT32(ACPI_INTERRUPT_NOT_HANDLED);
|
|
}
|
|
}
|
|
|
|
gpe_event_info->disable_for_dispatch = TRUE;
|
|
|
|
/*
|
|
* Dispatch the GPE to either an installed handler or the control
|
|
* method associated with this GPE (_Lxx or _Exx). If a handler
|
|
* exists, we invoke it and do not attempt to run the method.
|
|
* If there is neither a handler nor a method, leave the GPE
|
|
* disabled.
|
|
*/
|
|
switch (ACPI_GPE_DISPATCH_TYPE(gpe_event_info->flags)) {
|
|
case ACPI_GPE_DISPATCH_HANDLER:
|
|
|
|
/* Invoke the installed handler (at interrupt level) */
|
|
|
|
return_value =
|
|
gpe_event_info->dispatch.handler->address(gpe_device,
|
|
gpe_number,
|
|
gpe_event_info->
|
|
dispatch.handler->
|
|
context);
|
|
|
|
/* If requested, clear (if level-triggered) and reenable the GPE */
|
|
|
|
if (return_value & ACPI_REENABLE_GPE) {
|
|
(void)acpi_ev_finish_gpe(gpe_event_info);
|
|
}
|
|
break;
|
|
|
|
case ACPI_GPE_DISPATCH_METHOD:
|
|
case ACPI_GPE_DISPATCH_NOTIFY:
|
|
/*
|
|
* Execute the method associated with the GPE
|
|
* NOTE: Level-triggered GPEs are cleared after the method completes.
|
|
*/
|
|
status = acpi_os_execute(OSL_GPE_HANDLER,
|
|
acpi_ev_asynch_execute_gpe_method,
|
|
gpe_event_info);
|
|
if (ACPI_FAILURE(status)) {
|
|
ACPI_EXCEPTION((AE_INFO, status,
|
|
"Unable to queue handler for GPE %02X - event disabled",
|
|
gpe_number));
|
|
}
|
|
break;
|
|
|
|
default:
|
|
/*
|
|
* No handler or method to run!
|
|
* 03/2010: This case should no longer be possible. We will not allow
|
|
* a GPE to be enabled if it has no handler or method.
|
|
*/
|
|
ACPI_ERROR((AE_INFO,
|
|
"No handler or method for GPE %02X, disabling event",
|
|
gpe_number));
|
|
|
|
break;
|
|
}
|
|
|
|
return_UINT32(ACPI_INTERRUPT_HANDLED);
|
|
}
|
|
|
|
#endif /* !ACPI_REDUCED_HARDWARE */
|