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134d2531ef
To ensure code clarity and prevent potential errors, it's advisable to employ the ';' as a statement separator, except when ',' are intentionally used for specific purposes. Signed-off-by: Shen Lichuan <shenlichuan@vivo.com> Reviewed-by: Wim Van Sebroeck <wim@linux-watchdog.org> Link: https://lore.kernel.org/r/20240910070058.40867-1-shenlichuan@vivo.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
278 lines
7.0 KiB
C
278 lines
7.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/property.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/watchdog.h>
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#define PON_POFF_REASON1 0x0c
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#define PON_POFF_REASON1_PMIC_WD BIT(2)
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#define PON_POFF_REASON2 0x0d
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#define PON_POFF_REASON2_UVLO BIT(5)
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#define PON_POFF_REASON2_OTST3 BIT(6)
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#define PON_INT_RT_STS 0x10
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#define PMIC_WD_BARK_STS_BIT BIT(6)
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#define PON_PMIC_WD_RESET_S1_TIMER 0x54
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#define PON_PMIC_WD_RESET_S2_TIMER 0x55
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#define PON_PMIC_WD_RESET_S2_CTL 0x56
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#define RESET_TYPE_WARM 0x01
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#define RESET_TYPE_SHUTDOWN 0x04
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#define RESET_TYPE_HARD 0x07
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#define PON_PMIC_WD_RESET_S2_CTL2 0x57
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#define S2_RESET_EN_BIT BIT(7)
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#define PON_PMIC_WD_RESET_PET 0x58
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#define WATCHDOG_PET_BIT BIT(0)
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#define PM8916_WDT_DEFAULT_TIMEOUT 32
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#define PM8916_WDT_MIN_TIMEOUT 1
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#define PM8916_WDT_MAX_TIMEOUT 127
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struct pm8916_wdt {
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struct regmap *regmap;
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struct watchdog_device wdev;
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u32 baseaddr;
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};
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static int pm8916_wdt_start(struct watchdog_device *wdev)
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{
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struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
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return regmap_update_bits(wdt->regmap,
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wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2,
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S2_RESET_EN_BIT, S2_RESET_EN_BIT);
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}
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static int pm8916_wdt_stop(struct watchdog_device *wdev)
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{
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struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
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return regmap_update_bits(wdt->regmap,
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wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2,
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S2_RESET_EN_BIT, 0);
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}
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static int pm8916_wdt_ping(struct watchdog_device *wdev)
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{
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struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
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return regmap_write(wdt->regmap, wdt->baseaddr + PON_PMIC_WD_RESET_PET,
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WATCHDOG_PET_BIT);
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}
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static int pm8916_wdt_configure_timers(struct watchdog_device *wdev)
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{
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struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
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int err;
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err = regmap_write(wdt->regmap,
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wdt->baseaddr + PON_PMIC_WD_RESET_S1_TIMER,
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wdev->timeout - wdev->pretimeout);
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if (err)
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return err;
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return regmap_write(wdt->regmap,
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wdt->baseaddr + PON_PMIC_WD_RESET_S2_TIMER,
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wdev->pretimeout);
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}
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static int pm8916_wdt_set_timeout(struct watchdog_device *wdev,
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unsigned int timeout)
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{
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wdev->timeout = timeout;
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return pm8916_wdt_configure_timers(wdev);
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}
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static int pm8916_wdt_set_pretimeout(struct watchdog_device *wdev,
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unsigned int pretimeout)
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{
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wdev->pretimeout = pretimeout;
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return pm8916_wdt_configure_timers(wdev);
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}
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static irqreturn_t pm8916_wdt_isr(int irq, void *arg)
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{
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struct pm8916_wdt *wdt = arg;
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int err, sts;
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err = regmap_read(wdt->regmap, wdt->baseaddr + PON_INT_RT_STS, &sts);
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if (err)
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return IRQ_HANDLED;
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if (sts & PMIC_WD_BARK_STS_BIT)
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watchdog_notify_pretimeout(&wdt->wdev);
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return IRQ_HANDLED;
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}
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static const struct watchdog_info pm8916_wdt_ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE |
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WDIOF_OVERHEAT | WDIOF_CARDRESET | WDIOF_POWERUNDER,
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.identity = "QCOM PM8916 PON WDT",
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};
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static const struct watchdog_info pm8916_wdt_pt_ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE |
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WDIOF_OVERHEAT | WDIOF_CARDRESET | WDIOF_POWERUNDER |
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WDIOF_PRETIMEOUT,
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.identity = "QCOM PM8916 PON WDT",
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};
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static const struct watchdog_ops pm8916_wdt_ops = {
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.owner = THIS_MODULE,
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.start = pm8916_wdt_start,
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.stop = pm8916_wdt_stop,
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.ping = pm8916_wdt_ping,
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.set_timeout = pm8916_wdt_set_timeout,
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.set_pretimeout = pm8916_wdt_set_pretimeout,
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};
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static int pm8916_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct pm8916_wdt *wdt;
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struct device *parent;
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unsigned int val;
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int err, irq;
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u8 poff[2];
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wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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parent = dev->parent;
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/*
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* The pm8916-pon-wdt is a child of the pon device, which is a child
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* of the pm8916 mfd device. We want access to the pm8916 registers.
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* Retrieve regmap from pm8916 (parent->parent) and base address
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* from pm8916-pon (pon).
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*/
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wdt->regmap = dev_get_regmap(parent->parent, NULL);
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if (!wdt->regmap) {
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dev_err(dev, "failed to locate regmap\n");
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return -ENODEV;
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}
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err = device_property_read_u32(parent, "reg", &wdt->baseaddr);
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if (err) {
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dev_err(dev, "failed to get pm8916-pon address\n");
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return err;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq > 0) {
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err = devm_request_irq(dev, irq, pm8916_wdt_isr, 0,
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"pm8916_wdt", wdt);
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if (err)
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return err;
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wdt->wdev.info = &pm8916_wdt_pt_ident;
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} else {
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if (irq == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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wdt->wdev.info = &pm8916_wdt_ident;
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}
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err = regmap_bulk_read(wdt->regmap, wdt->baseaddr + PON_POFF_REASON1,
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&poff, ARRAY_SIZE(poff));
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if (err) {
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dev_err(dev, "failed to read POFF reason: %d\n", err);
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return err;
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}
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dev_dbg(dev, "POFF reason: %#x %#x\n", poff[0], poff[1]);
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if (poff[0] & PON_POFF_REASON1_PMIC_WD)
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wdt->wdev.bootstatus |= WDIOF_CARDRESET;
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if (poff[1] & PON_POFF_REASON2_UVLO)
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wdt->wdev.bootstatus |= WDIOF_POWERUNDER;
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if (poff[1] & PON_POFF_REASON2_OTST3)
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wdt->wdev.bootstatus |= WDIOF_OVERHEAT;
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err = regmap_read(wdt->regmap, wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2,
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&val);
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if (err) {
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dev_err(dev, "failed to check if watchdog is active: %d\n", err);
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return err;
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}
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if (val & S2_RESET_EN_BIT)
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set_bit(WDOG_HW_RUNNING, &wdt->wdev.status);
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/* Configure watchdog to hard-reset mode */
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err = regmap_write(wdt->regmap,
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wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL,
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RESET_TYPE_HARD);
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if (err) {
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dev_err(dev, "failed configure watchdog\n");
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return err;
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}
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wdt->wdev.ops = &pm8916_wdt_ops;
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wdt->wdev.parent = dev;
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wdt->wdev.min_timeout = PM8916_WDT_MIN_TIMEOUT;
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wdt->wdev.max_timeout = PM8916_WDT_MAX_TIMEOUT;
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wdt->wdev.timeout = PM8916_WDT_DEFAULT_TIMEOUT;
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wdt->wdev.pretimeout = 0;
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watchdog_set_drvdata(&wdt->wdev, wdt);
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platform_set_drvdata(pdev, wdt);
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watchdog_init_timeout(&wdt->wdev, 0, dev);
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pm8916_wdt_configure_timers(&wdt->wdev);
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return devm_watchdog_register_device(dev, &wdt->wdev);
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}
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static int __maybe_unused pm8916_wdt_suspend(struct device *dev)
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{
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struct pm8916_wdt *wdt = dev_get_drvdata(dev);
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if (watchdog_active(&wdt->wdev))
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return pm8916_wdt_stop(&wdt->wdev);
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return 0;
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}
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static int __maybe_unused pm8916_wdt_resume(struct device *dev)
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{
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struct pm8916_wdt *wdt = dev_get_drvdata(dev);
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if (watchdog_active(&wdt->wdev))
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return pm8916_wdt_start(&wdt->wdev);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(pm8916_wdt_pm_ops, pm8916_wdt_suspend,
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pm8916_wdt_resume);
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static const struct of_device_id pm8916_wdt_id_table[] = {
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{ .compatible = "qcom,pm8916-wdt" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, pm8916_wdt_id_table);
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static struct platform_driver pm8916_wdt_driver = {
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.probe = pm8916_wdt_probe,
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.driver = {
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.name = "pm8916-wdt",
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.of_match_table = pm8916_wdt_id_table,
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.pm = &pm8916_wdt_pm_ops,
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},
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};
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module_platform_driver(pm8916_wdt_driver);
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MODULE_AUTHOR("Loic Poulain <loic.poulain@linaro.org>");
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MODULE_DESCRIPTION("Qualcomm pm8916 watchdog driver");
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MODULE_LICENSE("GPL v2");
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