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These cases were done with this Coccinelle: @@ expression H; expression L; @@ - (get_random_u32_below(H) + L) + get_random_u32_inclusive(L, H + L - 1) @@ expression H; expression L; expression E; @@ get_random_u32_inclusive(L, H - + E - - E ) @@ expression H; expression L; expression E; @@ get_random_u32_inclusive(L, H - - E - + E ) @@ expression H; expression L; expression E; expression F; @@ get_random_u32_inclusive(L, H - - E + F - + E ) @@ expression H; expression L; expression E; expression F; @@ get_random_u32_inclusive(L, H - + E + F - - E ) And then subsequently cleaned up by hand, with several automatic cases rejected if it didn't make sense contextually. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> # for infiniband Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
265 lines
9.5 KiB
C
265 lines
9.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* KCSAN short boot-time selftests.
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*
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* Copyright (C) 2019, Google LLC.
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*/
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#define pr_fmt(fmt) "kcsan: " fmt
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#include <linux/atomic.h>
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#include <linux/bitops.h>
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#include <linux/init.h>
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#include <linux/kcsan-checks.h>
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#include <linux/kernel.h>
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#include <linux/printk.h>
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#include <linux/random.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include "encoding.h"
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#define ITERS_PER_TEST 2000
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/*
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* Test watchpoint encode and decode: check that encoding some access's info,
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* and then subsequent decode preserves the access's info.
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*/
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static bool __init test_encode_decode(void)
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{
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int i;
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for (i = 0; i < ITERS_PER_TEST; ++i) {
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size_t size = get_random_u32_inclusive(1, MAX_ENCODABLE_SIZE);
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bool is_write = !!get_random_u32_below(2);
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unsigned long verif_masked_addr;
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long encoded_watchpoint;
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bool verif_is_write;
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unsigned long addr;
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size_t verif_size;
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get_random_bytes(&addr, sizeof(addr));
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if (addr < PAGE_SIZE)
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addr = PAGE_SIZE;
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if (WARN_ON(!check_encodable(addr, size)))
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return false;
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encoded_watchpoint = encode_watchpoint(addr, size, is_write);
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/* Check special watchpoints */
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if (WARN_ON(decode_watchpoint(INVALID_WATCHPOINT, &verif_masked_addr, &verif_size, &verif_is_write)))
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return false;
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if (WARN_ON(decode_watchpoint(CONSUMED_WATCHPOINT, &verif_masked_addr, &verif_size, &verif_is_write)))
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return false;
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/* Check decoding watchpoint returns same data */
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if (WARN_ON(!decode_watchpoint(encoded_watchpoint, &verif_masked_addr, &verif_size, &verif_is_write)))
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return false;
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if (WARN_ON(verif_masked_addr != (addr & WATCHPOINT_ADDR_MASK)))
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goto fail;
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if (WARN_ON(verif_size != size))
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goto fail;
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if (WARN_ON(is_write != verif_is_write))
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goto fail;
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continue;
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fail:
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pr_err("%s fail: %s %zu bytes @ %lx -> encoded: %lx -> %s %zu bytes @ %lx\n",
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__func__, is_write ? "write" : "read", size, addr, encoded_watchpoint,
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verif_is_write ? "write" : "read", verif_size, verif_masked_addr);
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return false;
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}
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return true;
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}
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/* Test access matching function. */
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static bool __init test_matching_access(void)
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{
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if (WARN_ON(!matching_access(10, 1, 10, 1)))
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return false;
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if (WARN_ON(!matching_access(10, 2, 11, 1)))
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return false;
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if (WARN_ON(!matching_access(10, 1, 9, 2)))
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return false;
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if (WARN_ON(matching_access(10, 1, 11, 1)))
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return false;
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if (WARN_ON(matching_access(9, 1, 10, 1)))
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return false;
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/*
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* An access of size 0 could match another access, as demonstrated here.
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* Rather than add more comparisons to 'matching_access()', which would
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* end up in the fast-path for *all* checks, check_access() simply
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* returns for all accesses of size 0.
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*/
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if (WARN_ON(!matching_access(8, 8, 12, 0)))
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return false;
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return true;
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}
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/*
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* Correct memory barrier instrumentation is critical to avoiding false
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* positives: simple test to check at boot certain barriers are always properly
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* instrumented. See kcsan_test for a more complete test.
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*/
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static DEFINE_SPINLOCK(test_spinlock);
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static bool __init test_barrier(void)
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{
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#ifdef CONFIG_KCSAN_WEAK_MEMORY
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struct kcsan_scoped_access *reorder_access = ¤t->kcsan_ctx.reorder_access;
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#else
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struct kcsan_scoped_access *reorder_access = NULL;
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#endif
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bool ret = true;
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arch_spinlock_t arch_spinlock = __ARCH_SPIN_LOCK_UNLOCKED;
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atomic_t dummy;
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long test_var;
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if (!reorder_access || !IS_ENABLED(CONFIG_SMP))
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return true;
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#define __KCSAN_CHECK_BARRIER(access_type, barrier, name) \
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do { \
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reorder_access->type = (access_type) | KCSAN_ACCESS_SCOPED; \
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reorder_access->size = 1; \
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barrier; \
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if (reorder_access->size != 0) { \
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pr_err("improperly instrumented type=(" #access_type "): " name "\n"); \
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ret = false; \
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} \
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} while (0)
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#define KCSAN_CHECK_READ_BARRIER(b) __KCSAN_CHECK_BARRIER(0, b, #b)
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#define KCSAN_CHECK_WRITE_BARRIER(b) __KCSAN_CHECK_BARRIER(KCSAN_ACCESS_WRITE, b, #b)
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#define KCSAN_CHECK_RW_BARRIER(b) __KCSAN_CHECK_BARRIER(KCSAN_ACCESS_WRITE | KCSAN_ACCESS_COMPOUND, b, #b)
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kcsan_nestable_atomic_begin(); /* No watchpoints in called functions. */
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KCSAN_CHECK_READ_BARRIER(mb());
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KCSAN_CHECK_READ_BARRIER(rmb());
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KCSAN_CHECK_READ_BARRIER(smp_mb());
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KCSAN_CHECK_READ_BARRIER(smp_rmb());
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KCSAN_CHECK_READ_BARRIER(dma_rmb());
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KCSAN_CHECK_READ_BARRIER(smp_mb__before_atomic());
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KCSAN_CHECK_READ_BARRIER(smp_mb__after_atomic());
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KCSAN_CHECK_READ_BARRIER(smp_mb__after_spinlock());
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KCSAN_CHECK_READ_BARRIER(smp_store_mb(test_var, 0));
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KCSAN_CHECK_READ_BARRIER(smp_store_release(&test_var, 0));
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KCSAN_CHECK_READ_BARRIER(xchg(&test_var, 0));
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KCSAN_CHECK_READ_BARRIER(xchg_release(&test_var, 0));
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KCSAN_CHECK_READ_BARRIER(cmpxchg(&test_var, 0, 0));
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KCSAN_CHECK_READ_BARRIER(cmpxchg_release(&test_var, 0, 0));
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KCSAN_CHECK_READ_BARRIER(atomic_set_release(&dummy, 0));
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KCSAN_CHECK_READ_BARRIER(atomic_add_return(1, &dummy));
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KCSAN_CHECK_READ_BARRIER(atomic_add_return_release(1, &dummy));
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KCSAN_CHECK_READ_BARRIER(atomic_fetch_add(1, &dummy));
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KCSAN_CHECK_READ_BARRIER(atomic_fetch_add_release(1, &dummy));
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KCSAN_CHECK_READ_BARRIER(test_and_set_bit(0, &test_var));
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KCSAN_CHECK_READ_BARRIER(test_and_clear_bit(0, &test_var));
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KCSAN_CHECK_READ_BARRIER(test_and_change_bit(0, &test_var));
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KCSAN_CHECK_READ_BARRIER(clear_bit_unlock(0, &test_var));
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KCSAN_CHECK_READ_BARRIER(__clear_bit_unlock(0, &test_var));
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arch_spin_lock(&arch_spinlock);
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KCSAN_CHECK_READ_BARRIER(arch_spin_unlock(&arch_spinlock));
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spin_lock(&test_spinlock);
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KCSAN_CHECK_READ_BARRIER(spin_unlock(&test_spinlock));
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KCSAN_CHECK_WRITE_BARRIER(mb());
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KCSAN_CHECK_WRITE_BARRIER(wmb());
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KCSAN_CHECK_WRITE_BARRIER(smp_mb());
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KCSAN_CHECK_WRITE_BARRIER(smp_wmb());
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KCSAN_CHECK_WRITE_BARRIER(dma_wmb());
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KCSAN_CHECK_WRITE_BARRIER(smp_mb__before_atomic());
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KCSAN_CHECK_WRITE_BARRIER(smp_mb__after_atomic());
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KCSAN_CHECK_WRITE_BARRIER(smp_mb__after_spinlock());
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KCSAN_CHECK_WRITE_BARRIER(smp_store_mb(test_var, 0));
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KCSAN_CHECK_WRITE_BARRIER(smp_store_release(&test_var, 0));
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KCSAN_CHECK_WRITE_BARRIER(xchg(&test_var, 0));
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KCSAN_CHECK_WRITE_BARRIER(xchg_release(&test_var, 0));
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KCSAN_CHECK_WRITE_BARRIER(cmpxchg(&test_var, 0, 0));
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KCSAN_CHECK_WRITE_BARRIER(cmpxchg_release(&test_var, 0, 0));
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KCSAN_CHECK_WRITE_BARRIER(atomic_set_release(&dummy, 0));
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KCSAN_CHECK_WRITE_BARRIER(atomic_add_return(1, &dummy));
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KCSAN_CHECK_WRITE_BARRIER(atomic_add_return_release(1, &dummy));
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KCSAN_CHECK_WRITE_BARRIER(atomic_fetch_add(1, &dummy));
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KCSAN_CHECK_WRITE_BARRIER(atomic_fetch_add_release(1, &dummy));
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KCSAN_CHECK_WRITE_BARRIER(test_and_set_bit(0, &test_var));
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KCSAN_CHECK_WRITE_BARRIER(test_and_clear_bit(0, &test_var));
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KCSAN_CHECK_WRITE_BARRIER(test_and_change_bit(0, &test_var));
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KCSAN_CHECK_WRITE_BARRIER(clear_bit_unlock(0, &test_var));
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KCSAN_CHECK_WRITE_BARRIER(__clear_bit_unlock(0, &test_var));
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arch_spin_lock(&arch_spinlock);
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KCSAN_CHECK_WRITE_BARRIER(arch_spin_unlock(&arch_spinlock));
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spin_lock(&test_spinlock);
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KCSAN_CHECK_WRITE_BARRIER(spin_unlock(&test_spinlock));
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KCSAN_CHECK_RW_BARRIER(mb());
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KCSAN_CHECK_RW_BARRIER(wmb());
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KCSAN_CHECK_RW_BARRIER(rmb());
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KCSAN_CHECK_RW_BARRIER(smp_mb());
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KCSAN_CHECK_RW_BARRIER(smp_wmb());
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KCSAN_CHECK_RW_BARRIER(smp_rmb());
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KCSAN_CHECK_RW_BARRIER(dma_wmb());
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KCSAN_CHECK_RW_BARRIER(dma_rmb());
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KCSAN_CHECK_RW_BARRIER(smp_mb__before_atomic());
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KCSAN_CHECK_RW_BARRIER(smp_mb__after_atomic());
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KCSAN_CHECK_RW_BARRIER(smp_mb__after_spinlock());
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KCSAN_CHECK_RW_BARRIER(smp_store_mb(test_var, 0));
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KCSAN_CHECK_RW_BARRIER(smp_store_release(&test_var, 0));
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KCSAN_CHECK_RW_BARRIER(xchg(&test_var, 0));
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KCSAN_CHECK_RW_BARRIER(xchg_release(&test_var, 0));
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KCSAN_CHECK_RW_BARRIER(cmpxchg(&test_var, 0, 0));
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KCSAN_CHECK_RW_BARRIER(cmpxchg_release(&test_var, 0, 0));
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KCSAN_CHECK_RW_BARRIER(atomic_set_release(&dummy, 0));
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KCSAN_CHECK_RW_BARRIER(atomic_add_return(1, &dummy));
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KCSAN_CHECK_RW_BARRIER(atomic_add_return_release(1, &dummy));
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KCSAN_CHECK_RW_BARRIER(atomic_fetch_add(1, &dummy));
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KCSAN_CHECK_RW_BARRIER(atomic_fetch_add_release(1, &dummy));
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KCSAN_CHECK_RW_BARRIER(test_and_set_bit(0, &test_var));
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KCSAN_CHECK_RW_BARRIER(test_and_clear_bit(0, &test_var));
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KCSAN_CHECK_RW_BARRIER(test_and_change_bit(0, &test_var));
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KCSAN_CHECK_RW_BARRIER(clear_bit_unlock(0, &test_var));
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KCSAN_CHECK_RW_BARRIER(__clear_bit_unlock(0, &test_var));
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arch_spin_lock(&arch_spinlock);
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KCSAN_CHECK_RW_BARRIER(arch_spin_unlock(&arch_spinlock));
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spin_lock(&test_spinlock);
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KCSAN_CHECK_RW_BARRIER(spin_unlock(&test_spinlock));
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#ifdef clear_bit_unlock_is_negative_byte
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KCSAN_CHECK_RW_BARRIER(clear_bit_unlock_is_negative_byte(0, &test_var));
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KCSAN_CHECK_READ_BARRIER(clear_bit_unlock_is_negative_byte(0, &test_var));
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KCSAN_CHECK_WRITE_BARRIER(clear_bit_unlock_is_negative_byte(0, &test_var));
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#endif
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kcsan_nestable_atomic_end();
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return ret;
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}
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static int __init kcsan_selftest(void)
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{
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int passed = 0;
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int total = 0;
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#define RUN_TEST(do_test) \
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do { \
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++total; \
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if (do_test()) \
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++passed; \
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else \
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pr_err("selftest: " #do_test " failed"); \
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} while (0)
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RUN_TEST(test_encode_decode);
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RUN_TEST(test_matching_access);
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RUN_TEST(test_barrier);
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pr_info("selftest: %d/%d tests passed\n", passed, total);
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if (passed != total)
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panic("selftests failed");
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return 0;
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}
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postcore_initcall(kcsan_selftest);
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