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138f4c359d
Channel switching is problematic for some dmaengine drivers as the architecture precludes separating the ->prep from ->submit. In these cases the driver can select ASYNC_TX_DISABLE_CHANNEL_SWITCH to modify the async_tx allocator to only return channels that support all of the required asynchronous operations. For example MD_RAID456=y selects support for asynchronous xor, xor validate, pq, pq validate, and memcpy. When ASYNC_TX_DISABLE_CHANNEL_SWITCH=y any channel with all these capabilities is marked DMA_ASYNC_TX allowing async_tx_find_channel() to quickly locate compatible channels with the guarantee that dependency chains will remain on one channel. When ASYNC_TX_DISABLE_CHANNEL_SWITCH=n async_tx_find_channel() may select channels that lead to operation chains that need to cross channel boundaries using the async_tx channel switch capability. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
301 lines
7.8 KiB
C
301 lines
7.8 KiB
C
/*
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* core routines for the asynchronous memory transfer/transform api
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*
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* Copyright © 2006, Intel Corporation.
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*
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* Dan Williams <dan.j.williams@intel.com>
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*
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* with architecture considerations by:
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* Neil Brown <neilb@suse.de>
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* Jeff Garzik <jeff@garzik.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <linux/rculist.h>
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#include <linux/kernel.h>
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#include <linux/async_tx.h>
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#ifdef CONFIG_DMA_ENGINE
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static int __init async_tx_init(void)
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{
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async_dmaengine_get();
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printk(KERN_INFO "async_tx: api initialized (async)\n");
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return 0;
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}
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static void __exit async_tx_exit(void)
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{
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async_dmaengine_put();
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}
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module_init(async_tx_init);
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module_exit(async_tx_exit);
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/**
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* __async_tx_find_channel - find a channel to carry out the operation or let
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* the transaction execute synchronously
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* @submit: transaction dependency and submission modifiers
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* @tx_type: transaction type
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*/
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struct dma_chan *
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__async_tx_find_channel(struct async_submit_ctl *submit,
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enum dma_transaction_type tx_type)
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{
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struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
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/* see if we can keep the chain on one channel */
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if (depend_tx &&
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dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
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return depend_tx->chan;
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return async_dma_find_channel(tx_type);
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}
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EXPORT_SYMBOL_GPL(__async_tx_find_channel);
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#endif
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/**
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* async_tx_channel_switch - queue an interrupt descriptor with a dependency
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* pre-attached.
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* @depend_tx: the operation that must finish before the new operation runs
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* @tx: the new operation
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*/
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static void
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async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
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struct dma_async_tx_descriptor *tx)
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{
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struct dma_chan *chan = depend_tx->chan;
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struct dma_device *device = chan->device;
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struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
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#ifdef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH
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BUG();
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#endif
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/* first check to see if we can still append to depend_tx */
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spin_lock_bh(&depend_tx->lock);
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if (depend_tx->parent && depend_tx->chan == tx->chan) {
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tx->parent = depend_tx;
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depend_tx->next = tx;
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intr_tx = NULL;
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}
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spin_unlock_bh(&depend_tx->lock);
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/* attached dependency, flush the parent channel */
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if (!intr_tx) {
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device->device_issue_pending(chan);
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return;
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}
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/* see if we can schedule an interrupt
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* otherwise poll for completion
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*/
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if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
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intr_tx = device->device_prep_dma_interrupt(chan, 0);
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else
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intr_tx = NULL;
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if (intr_tx) {
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intr_tx->callback = NULL;
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intr_tx->callback_param = NULL;
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tx->parent = intr_tx;
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/* safe to set ->next outside the lock since we know we are
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* not submitted yet
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*/
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intr_tx->next = tx;
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/* check if we need to append */
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spin_lock_bh(&depend_tx->lock);
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if (depend_tx->parent) {
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intr_tx->parent = depend_tx;
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depend_tx->next = intr_tx;
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async_tx_ack(intr_tx);
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intr_tx = NULL;
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}
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spin_unlock_bh(&depend_tx->lock);
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if (intr_tx) {
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intr_tx->parent = NULL;
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intr_tx->tx_submit(intr_tx);
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async_tx_ack(intr_tx);
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}
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device->device_issue_pending(chan);
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} else {
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if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for depend_tx\n",
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__func__);
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tx->tx_submit(tx);
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}
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}
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/**
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* submit_disposition - flags for routing an incoming operation
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* @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
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* @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
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* @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
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*
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* while holding depend_tx->lock we must avoid submitting new operations
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* to prevent a circular locking dependency with drivers that already
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* hold a channel lock when calling async_tx_run_dependencies.
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*/
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enum submit_disposition {
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ASYNC_TX_SUBMITTED,
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ASYNC_TX_CHANNEL_SWITCH,
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ASYNC_TX_DIRECT_SUBMIT,
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};
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void
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async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
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struct async_submit_ctl *submit)
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{
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struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
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tx->callback = submit->cb_fn;
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tx->callback_param = submit->cb_param;
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if (depend_tx) {
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enum submit_disposition s;
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/* sanity check the dependency chain:
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* 1/ if ack is already set then we cannot be sure
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* we are referring to the correct operation
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* 2/ dependencies are 1:1 i.e. two transactions can
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* not depend on the same parent
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*/
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BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
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tx->parent);
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/* the lock prevents async_tx_run_dependencies from missing
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* the setting of ->next when ->parent != NULL
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*/
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spin_lock_bh(&depend_tx->lock);
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if (depend_tx->parent) {
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/* we have a parent so we can not submit directly
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* if we are staying on the same channel: append
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* else: channel switch
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*/
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if (depend_tx->chan == chan) {
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tx->parent = depend_tx;
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depend_tx->next = tx;
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s = ASYNC_TX_SUBMITTED;
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} else
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s = ASYNC_TX_CHANNEL_SWITCH;
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} else {
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/* we do not have a parent so we may be able to submit
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* directly if we are staying on the same channel
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*/
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if (depend_tx->chan == chan)
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s = ASYNC_TX_DIRECT_SUBMIT;
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else
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s = ASYNC_TX_CHANNEL_SWITCH;
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}
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spin_unlock_bh(&depend_tx->lock);
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switch (s) {
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case ASYNC_TX_SUBMITTED:
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break;
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case ASYNC_TX_CHANNEL_SWITCH:
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async_tx_channel_switch(depend_tx, tx);
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break;
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case ASYNC_TX_DIRECT_SUBMIT:
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tx->parent = NULL;
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tx->tx_submit(tx);
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break;
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}
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} else {
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tx->parent = NULL;
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tx->tx_submit(tx);
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}
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if (submit->flags & ASYNC_TX_ACK)
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async_tx_ack(tx);
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if (depend_tx)
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async_tx_ack(depend_tx);
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}
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EXPORT_SYMBOL_GPL(async_tx_submit);
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/**
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* async_trigger_callback - schedules the callback function to be run
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* @submit: submission and completion parameters
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*
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* honored flags: ASYNC_TX_ACK
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*
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* The callback is run after any dependent operations have completed.
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*/
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struct dma_async_tx_descriptor *
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async_trigger_callback(struct async_submit_ctl *submit)
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{
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struct dma_chan *chan;
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struct dma_device *device;
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struct dma_async_tx_descriptor *tx;
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struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
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if (depend_tx) {
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chan = depend_tx->chan;
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device = chan->device;
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/* see if we can schedule an interrupt
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* otherwise poll for completion
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*/
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if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
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device = NULL;
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tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
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} else
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tx = NULL;
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if (tx) {
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pr_debug("%s: (async)\n", __func__);
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async_tx_submit(chan, tx, submit);
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} else {
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pr_debug("%s: (sync)\n", __func__);
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/* wait for any prerequisite operations */
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async_tx_quiesce(&submit->depend_tx);
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async_tx_sync_epilog(submit);
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}
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return tx;
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}
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EXPORT_SYMBOL_GPL(async_trigger_callback);
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/**
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* async_tx_quiesce - ensure tx is complete and freeable upon return
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* @tx - transaction to quiesce
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*/
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void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
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{
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if (*tx) {
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/* if ack is already set then we cannot be sure
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* we are referring to the correct operation
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*/
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BUG_ON(async_tx_test_ack(*tx));
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if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
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panic("DMA_ERROR waiting for transaction\n");
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async_tx_ack(*tx);
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*tx = NULL;
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}
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}
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EXPORT_SYMBOL_GPL(async_tx_quiesce);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
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MODULE_LICENSE("GPL");
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