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1097163870
The increment of delay counter was 2 instructions: Arithmatic Shfit Left (ASL) + set to 1 on overflow This can be done in 1 using ROtate Left (ROL) Suggested-by: Nigel Topham <ntopham@synopsys.com> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
692 lines
15 KiB
C
692 lines
15 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#include <asm/spinlock_types.h>
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#include <asm/processor.h>
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#include <asm/barrier.h>
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#define arch_spin_is_locked(x) ((x)->slock != __ARCH_SPIN_LOCK_UNLOCKED__)
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#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
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#define arch_spin_unlock_wait(x) \
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do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)
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#ifdef CONFIG_ARC_HAS_LLSC
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/*
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* A normal LLOCK/SCOND based system, w/o need for livelock workaround
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*/
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#ifndef CONFIG_ARC_STAR_9000923308
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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unsigned int val;
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smp_mb();
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__asm__ __volatile__(
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"1: llock %[val], [%[slock]] \n"
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" breq %[val], %[LOCKED], 1b \n" /* spin while LOCKED */
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" scond %[LOCKED], [%[slock]] \n" /* acquire */
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" bnz 1b \n"
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" \n"
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: [val] "=&r" (val)
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: [slock] "r" (&(lock->slock)),
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[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
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: "memory", "cc");
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smp_mb();
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}
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/* 1 - lock taken successfully */
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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{
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unsigned int val, got_it = 0;
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smp_mb();
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__asm__ __volatile__(
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"1: llock %[val], [%[slock]] \n"
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" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
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" scond %[LOCKED], [%[slock]] \n" /* acquire */
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" bnz 1b \n"
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" mov %[got_it], 1 \n"
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"4: \n"
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" \n"
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: [val] "=&r" (val),
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[got_it] "+&r" (got_it)
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: [slock] "r" (&(lock->slock)),
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[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
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: "memory", "cc");
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smp_mb();
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return got_it;
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}
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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smp_mb();
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lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
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smp_mb();
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}
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/*
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* Read-write spinlocks, allowing multiple readers but only one writer.
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* Unfair locking as Writers could be starved indefinitely by Reader(s)
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*/
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static inline void arch_read_lock(arch_rwlock_t *rw)
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{
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unsigned int val;
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smp_mb();
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/*
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* zero means writer holds the lock exclusively, deny Reader.
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* Otherwise grant lock to first/subseq reader
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*
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* if (rw->counter > 0) {
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* rw->counter--;
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* ret = 1;
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* }
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*/
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__asm__ __volatile__(
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"1: llock %[val], [%[rwlock]] \n"
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" brls %[val], %[WR_LOCKED], 1b\n" /* <= 0: spin while write locked */
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" sub %[val], %[val], 1 \n" /* reader lock */
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" scond %[val], [%[rwlock]] \n"
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" bnz 1b \n"
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" \n"
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: [val] "=&r" (val)
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: [rwlock] "r" (&(rw->counter)),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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}
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/* 1 - lock taken successfully */
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static inline int arch_read_trylock(arch_rwlock_t *rw)
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{
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unsigned int val, got_it = 0;
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smp_mb();
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__asm__ __volatile__(
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"1: llock %[val], [%[rwlock]] \n"
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" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
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" sub %[val], %[val], 1 \n" /* counter-- */
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" scond %[val], [%[rwlock]] \n"
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" bnz 1b \n" /* retry if collided with someone */
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" mov %[got_it], 1 \n"
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" \n"
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"4: ; --- done --- \n"
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: [val] "=&r" (val),
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[got_it] "+&r" (got_it)
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: [rwlock] "r" (&(rw->counter)),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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return got_it;
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}
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static inline void arch_write_lock(arch_rwlock_t *rw)
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{
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unsigned int val;
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smp_mb();
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/*
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* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
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* deny writer. Otherwise if unlocked grant to writer
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* Hence the claim that Linux rwlocks are unfair to writers.
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* (can be starved for an indefinite time by readers).
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*
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* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
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* rw->counter = 0;
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* ret = 1;
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* }
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*/
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__asm__ __volatile__(
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"1: llock %[val], [%[rwlock]] \n"
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" brne %[val], %[UNLOCKED], 1b \n" /* while !UNLOCKED spin */
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" mov %[val], %[WR_LOCKED] \n"
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" scond %[val], [%[rwlock]] \n"
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" bnz 1b \n"
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" \n"
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: [val] "=&r" (val)
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: [rwlock] "r" (&(rw->counter)),
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[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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}
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/* 1 - lock taken successfully */
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static inline int arch_write_trylock(arch_rwlock_t *rw)
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{
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unsigned int val, got_it = 0;
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smp_mb();
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__asm__ __volatile__(
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"1: llock %[val], [%[rwlock]] \n"
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" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
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" mov %[val], %[WR_LOCKED] \n"
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" scond %[val], [%[rwlock]] \n"
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" bnz 1b \n" /* retry if collided with someone */
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" mov %[got_it], 1 \n"
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" \n"
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"4: ; --- done --- \n"
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: [val] "=&r" (val),
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[got_it] "+&r" (got_it)
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: [rwlock] "r" (&(rw->counter)),
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[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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return got_it;
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}
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static inline void arch_read_unlock(arch_rwlock_t *rw)
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{
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unsigned int val;
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smp_mb();
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/*
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* rw->counter++;
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*/
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__asm__ __volatile__(
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"1: llock %[val], [%[rwlock]] \n"
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" add %[val], %[val], 1 \n"
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" scond %[val], [%[rwlock]] \n"
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" bnz 1b \n"
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" \n"
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: [val] "=&r" (val)
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: [rwlock] "r" (&(rw->counter))
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: "memory", "cc");
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smp_mb();
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}
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static inline void arch_write_unlock(arch_rwlock_t *rw)
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{
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smp_mb();
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rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
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smp_mb();
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}
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#else /* CONFIG_ARC_STAR_9000923308 */
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/*
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* HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping
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* coherency transactions in the SCU. The exclusive line state keeps rotating
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* among contenting cores leading to a never ending cycle. So break the cycle
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* by deferring the retry of failed exclusive access (SCOND). The actual delay
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* needed is function of number of contending cores as well as the unrelated
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* coherency traffic from other cores. To keep the code simple, start off with
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* small delay of 1 which would suffice most cases and in case of contention
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* double the delay. Eventually the delay is sufficient such that the coherency
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* pipeline is drained, thus a subsequent exclusive access would succeed.
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*/
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#define SCOND_FAIL_RETRY_VAR_DEF \
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unsigned int delay, tmp; \
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#define SCOND_FAIL_RETRY_ASM \
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" ; --- scond fail delay --- \n" \
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" mov %[tmp], %[delay] \n" /* tmp = delay */ \
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"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
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" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
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" rol %[delay], %[delay] \n" /* delay *= 2 */ \
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" b 1b \n" /* start over */ \
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" \n" \
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"4: ; --- done --- \n" \
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#define SCOND_FAIL_RETRY_VARS \
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,[delay] "=&r" (delay), [tmp] "=&r" (tmp) \
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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unsigned int val;
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SCOND_FAIL_RETRY_VAR_DEF;
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smp_mb();
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__asm__ __volatile__(
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"0: mov %[delay], 1 \n"
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"1: llock %[val], [%[slock]] \n"
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" breq %[val], %[LOCKED], 0b \n" /* spin while LOCKED */
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" scond %[LOCKED], [%[slock]] \n" /* acquire */
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" bz 4f \n" /* done */
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" \n"
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SCOND_FAIL_RETRY_ASM
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: [val] "=&r" (val)
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SCOND_FAIL_RETRY_VARS
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: [slock] "r" (&(lock->slock)),
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[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
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: "memory", "cc");
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smp_mb();
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}
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/* 1 - lock taken successfully */
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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{
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unsigned int val, got_it = 0;
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SCOND_FAIL_RETRY_VAR_DEF;
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smp_mb();
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__asm__ __volatile__(
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"0: mov %[delay], 1 \n"
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"1: llock %[val], [%[slock]] \n"
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" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
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" scond %[LOCKED], [%[slock]] \n" /* acquire */
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" bz.d 4f \n"
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" mov.z %[got_it], 1 \n" /* got it */
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" \n"
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SCOND_FAIL_RETRY_ASM
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: [val] "=&r" (val),
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[got_it] "+&r" (got_it)
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SCOND_FAIL_RETRY_VARS
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: [slock] "r" (&(lock->slock)),
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[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
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: "memory", "cc");
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smp_mb();
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return got_it;
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}
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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smp_mb();
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lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
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smp_mb();
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}
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/*
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* Read-write spinlocks, allowing multiple readers but only one writer.
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* Unfair locking as Writers could be starved indefinitely by Reader(s)
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*/
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static inline void arch_read_lock(arch_rwlock_t *rw)
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{
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unsigned int val;
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SCOND_FAIL_RETRY_VAR_DEF;
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smp_mb();
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/*
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* zero means writer holds the lock exclusively, deny Reader.
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* Otherwise grant lock to first/subseq reader
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*
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* if (rw->counter > 0) {
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* rw->counter--;
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* ret = 1;
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* }
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*/
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__asm__ __volatile__(
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"0: mov %[delay], 1 \n"
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"1: llock %[val], [%[rwlock]] \n"
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" brls %[val], %[WR_LOCKED], 0b\n" /* <= 0: spin while write locked */
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" sub %[val], %[val], 1 \n" /* reader lock */
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" scond %[val], [%[rwlock]] \n"
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" bz 4f \n" /* done */
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" \n"
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SCOND_FAIL_RETRY_ASM
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: [val] "=&r" (val)
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SCOND_FAIL_RETRY_VARS
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: [rwlock] "r" (&(rw->counter)),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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}
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/* 1 - lock taken successfully */
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static inline int arch_read_trylock(arch_rwlock_t *rw)
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{
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unsigned int val, got_it = 0;
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SCOND_FAIL_RETRY_VAR_DEF;
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smp_mb();
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__asm__ __volatile__(
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"0: mov %[delay], 1 \n"
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"1: llock %[val], [%[rwlock]] \n"
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" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
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" sub %[val], %[val], 1 \n" /* counter-- */
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" scond %[val], [%[rwlock]] \n"
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" bz.d 4f \n"
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" mov.z %[got_it], 1 \n" /* got it */
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" \n"
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SCOND_FAIL_RETRY_ASM
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: [val] "=&r" (val),
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[got_it] "+&r" (got_it)
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SCOND_FAIL_RETRY_VARS
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: [rwlock] "r" (&(rw->counter)),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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return got_it;
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}
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static inline void arch_write_lock(arch_rwlock_t *rw)
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{
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unsigned int val;
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SCOND_FAIL_RETRY_VAR_DEF;
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smp_mb();
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/*
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* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
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* deny writer. Otherwise if unlocked grant to writer
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* Hence the claim that Linux rwlocks are unfair to writers.
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* (can be starved for an indefinite time by readers).
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*
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* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
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* rw->counter = 0;
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* ret = 1;
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* }
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*/
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__asm__ __volatile__(
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"0: mov %[delay], 1 \n"
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"1: llock %[val], [%[rwlock]] \n"
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" brne %[val], %[UNLOCKED], 0b \n" /* while !UNLOCKED spin */
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" mov %[val], %[WR_LOCKED] \n"
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" scond %[val], [%[rwlock]] \n"
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" bz 4f \n"
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" \n"
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SCOND_FAIL_RETRY_ASM
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: [val] "=&r" (val)
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SCOND_FAIL_RETRY_VARS
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: [rwlock] "r" (&(rw->counter)),
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[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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}
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/* 1 - lock taken successfully */
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static inline int arch_write_trylock(arch_rwlock_t *rw)
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{
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unsigned int val, got_it = 0;
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SCOND_FAIL_RETRY_VAR_DEF;
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smp_mb();
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__asm__ __volatile__(
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"0: mov %[delay], 1 \n"
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"1: llock %[val], [%[rwlock]] \n"
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" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
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" mov %[val], %[WR_LOCKED] \n"
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" scond %[val], [%[rwlock]] \n"
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" bz.d 4f \n"
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" mov.z %[got_it], 1 \n" /* got it */
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" \n"
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SCOND_FAIL_RETRY_ASM
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: [val] "=&r" (val),
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[got_it] "+&r" (got_it)
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SCOND_FAIL_RETRY_VARS
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: [rwlock] "r" (&(rw->counter)),
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[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
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[WR_LOCKED] "ir" (0)
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: "memory", "cc");
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smp_mb();
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return got_it;
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}
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static inline void arch_read_unlock(arch_rwlock_t *rw)
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{
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unsigned int val;
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smp_mb();
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/*
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* rw->counter++;
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*/
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__asm__ __volatile__(
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"1: llock %[val], [%[rwlock]] \n"
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" add %[val], %[val], 1 \n"
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" scond %[val], [%[rwlock]] \n"
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" bnz 1b \n"
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" \n"
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: [val] "=&r" (val)
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: [rwlock] "r" (&(rw->counter))
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: "memory", "cc");
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smp_mb();
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}
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static inline void arch_write_unlock(arch_rwlock_t *rw)
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{
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unsigned int val;
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smp_mb();
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|
/*
|
|
* rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
|
|
*/
|
|
__asm__ __volatile__(
|
|
"1: llock %[val], [%[rwlock]] \n"
|
|
" scond %[UNLOCKED], [%[rwlock]]\n"
|
|
" bnz 1b \n"
|
|
" \n"
|
|
: [val] "=&r" (val)
|
|
: [rwlock] "r" (&(rw->counter)),
|
|
[UNLOCKED] "r" (__ARCH_RW_LOCK_UNLOCKED__)
|
|
: "memory", "cc");
|
|
|
|
smp_mb();
|
|
}
|
|
|
|
#undef SCOND_FAIL_RETRY_VAR_DEF
|
|
#undef SCOND_FAIL_RETRY_ASM
|
|
#undef SCOND_FAIL_RETRY_VARS
|
|
|
|
#endif /* CONFIG_ARC_STAR_9000923308 */
|
|
|
|
#else /* !CONFIG_ARC_HAS_LLSC */
|
|
|
|
static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|
{
|
|
unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
|
|
|
|
/*
|
|
* This smp_mb() is technically superfluous, we only need the one
|
|
* after the lock for providing the ACQUIRE semantics.
|
|
* However doing the "right" thing was regressing hackbench
|
|
* so keeping this, pending further investigation
|
|
*/
|
|
smp_mb();
|
|
|
|
__asm__ __volatile__(
|
|
"1: ex %0, [%1] \n"
|
|
" breq %0, %2, 1b \n"
|
|
: "+&r" (val)
|
|
: "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)
|
|
: "memory");
|
|
|
|
/*
|
|
* ACQUIRE barrier to ensure load/store after taking the lock
|
|
* don't "bleed-up" out of the critical section (leak-in is allowed)
|
|
* http://www.spinics.net/lists/kernel/msg2010409.html
|
|
*
|
|
* ARCv2 only has load-load, store-store and all-all barrier
|
|
* thus need the full all-all barrier
|
|
*/
|
|
smp_mb();
|
|
}
|
|
|
|
/* 1 - lock taken successfully */
|
|
static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
|
{
|
|
unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
|
|
|
|
smp_mb();
|
|
|
|
__asm__ __volatile__(
|
|
"1: ex %0, [%1] \n"
|
|
: "+r" (val)
|
|
: "r"(&(lock->slock))
|
|
: "memory");
|
|
|
|
smp_mb();
|
|
|
|
return (val == __ARCH_SPIN_LOCK_UNLOCKED__);
|
|
}
|
|
|
|
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
|
{
|
|
unsigned int val = __ARCH_SPIN_LOCK_UNLOCKED__;
|
|
|
|
/*
|
|
* RELEASE barrier: given the instructions avail on ARCv2, full barrier
|
|
* is the only option
|
|
*/
|
|
smp_mb();
|
|
|
|
__asm__ __volatile__(
|
|
" ex %0, [%1] \n"
|
|
: "+r" (val)
|
|
: "r"(&(lock->slock))
|
|
: "memory");
|
|
|
|
/*
|
|
* superfluous, but keeping for now - see pairing version in
|
|
* arch_spin_lock above
|
|
*/
|
|
smp_mb();
|
|
}
|
|
|
|
/*
|
|
* Read-write spinlocks, allowing multiple readers but only one writer.
|
|
* Unfair locking as Writers could be starved indefinitely by Reader(s)
|
|
*
|
|
* The spinlock itself is contained in @counter and access to it is
|
|
* serialized with @lock_mutex.
|
|
*/
|
|
|
|
/* 1 - lock taken successfully */
|
|
static inline int arch_read_trylock(arch_rwlock_t *rw)
|
|
{
|
|
int ret = 0;
|
|
|
|
arch_spin_lock(&(rw->lock_mutex));
|
|
|
|
/*
|
|
* zero means writer holds the lock exclusively, deny Reader.
|
|
* Otherwise grant lock to first/subseq reader
|
|
*/
|
|
if (rw->counter > 0) {
|
|
rw->counter--;
|
|
ret = 1;
|
|
}
|
|
|
|
arch_spin_unlock(&(rw->lock_mutex));
|
|
|
|
smp_mb();
|
|
return ret;
|
|
}
|
|
|
|
/* 1 - lock taken successfully */
|
|
static inline int arch_write_trylock(arch_rwlock_t *rw)
|
|
{
|
|
int ret = 0;
|
|
|
|
arch_spin_lock(&(rw->lock_mutex));
|
|
|
|
/*
|
|
* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
|
|
* deny writer. Otherwise if unlocked grant to writer
|
|
* Hence the claim that Linux rwlocks are unfair to writers.
|
|
* (can be starved for an indefinite time by readers).
|
|
*/
|
|
if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
|
|
rw->counter = 0;
|
|
ret = 1;
|
|
}
|
|
arch_spin_unlock(&(rw->lock_mutex));
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline void arch_read_lock(arch_rwlock_t *rw)
|
|
{
|
|
while (!arch_read_trylock(rw))
|
|
cpu_relax();
|
|
}
|
|
|
|
static inline void arch_write_lock(arch_rwlock_t *rw)
|
|
{
|
|
while (!arch_write_trylock(rw))
|
|
cpu_relax();
|
|
}
|
|
|
|
static inline void arch_read_unlock(arch_rwlock_t *rw)
|
|
{
|
|
arch_spin_lock(&(rw->lock_mutex));
|
|
rw->counter++;
|
|
arch_spin_unlock(&(rw->lock_mutex));
|
|
}
|
|
|
|
static inline void arch_write_unlock(arch_rwlock_t *rw)
|
|
{
|
|
arch_spin_lock(&(rw->lock_mutex));
|
|
rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
|
|
arch_spin_unlock(&(rw->lock_mutex));
|
|
}
|
|
|
|
#endif
|
|
|
|
#define arch_read_can_lock(x) ((x)->counter > 0)
|
|
#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__)
|
|
|
|
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
|
|
#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
|
|
|
|
#define arch_spin_relax(lock) cpu_relax()
|
|
#define arch_read_relax(lock) cpu_relax()
|
|
#define arch_write_relax(lock) cpu_relax()
|
|
|
|
#endif /* __ASM_SPINLOCK_H */
|