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Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
146 lines
4.4 KiB
C
146 lines
4.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2010 Google, Inc.
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* Author: Erik Gilling <konkers@android.com>
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*
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* Copyright (C) 2011-2013 NVIDIA Corporation
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*/
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#include "../dev.h"
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#include "../debug.h"
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#include "../cdma.h"
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#include "../channel.h"
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static void host1x_debug_show_channel_cdma(struct host1x *host,
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struct host1x_channel *ch,
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struct output *o)
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{
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struct host1x_cdma *cdma = &ch->cdma;
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u32 dmaput, dmaget, dmactrl;
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u32 cbstat, cbread;
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u32 val, base, baseval;
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dmaput = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT);
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dmaget = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET);
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dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);
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cbread = host1x_sync_readl(host, HOST1X_SYNC_CBREAD(ch->id));
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cbstat = host1x_sync_readl(host, HOST1X_SYNC_CBSTAT(ch->id));
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host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev));
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if (HOST1X_CHANNEL_DMACTRL_DMASTOP_V(dmactrl) ||
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!ch->cdma.push_buffer.mapped) {
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host1x_debug_output(o, "inactive\n\n");
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return;
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}
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if (HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat) == HOST1X_CLASS_HOST1X &&
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HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat) ==
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HOST1X_UCLASS_WAIT_SYNCPT)
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host1x_debug_output(o, "waiting on syncpt %d val %d\n",
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cbread >> 24, cbread & 0xffffff);
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else if (HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat) ==
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HOST1X_CLASS_HOST1X &&
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HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat) ==
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HOST1X_UCLASS_WAIT_SYNCPT_BASE) {
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base = (cbread >> 16) & 0xff;
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baseval =
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host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(base));
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val = cbread & 0xffff;
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host1x_debug_output(o, "waiting on syncpt %d val %d (base %d = %d; offset = %d)\n",
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cbread >> 24, baseval + val, base,
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baseval, val);
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} else
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host1x_debug_output(o, "active class %02x, offset %04x, val %08x\n",
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HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat),
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HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat),
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cbread);
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host1x_debug_output(o, "DMAPUT %08x, DMAGET %08x, DMACTL %08x\n",
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dmaput, dmaget, dmactrl);
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host1x_debug_output(o, "CBREAD %08x, CBSTAT %08x\n", cbread, cbstat);
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show_channel_gathers(o, cdma);
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host1x_debug_output(o, "\n");
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}
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static void host1x_debug_show_channel_fifo(struct host1x *host,
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struct host1x_channel *ch,
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struct output *o)
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{
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u32 val, rd_ptr, wr_ptr, start, end;
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unsigned int data_count = 0;
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host1x_debug_output(o, "%u: fifo:\n", ch->id);
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val = host1x_ch_readl(ch, HOST1X_CHANNEL_FIFOSTAT);
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host1x_debug_output(o, "FIFOSTAT %08x\n", val);
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if (HOST1X_CHANNEL_FIFOSTAT_CFEMPTY_V(val)) {
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host1x_debug_output(o, "[empty]\n");
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return;
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}
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host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
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host1x_sync_writel(host, HOST1X_SYNC_CFPEEK_CTRL_ENA_F(1) |
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HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(ch->id),
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HOST1X_SYNC_CFPEEK_CTRL);
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val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_PTRS);
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rd_ptr = HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(val);
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wr_ptr = HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(val);
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val = host1x_sync_readl(host, HOST1X_SYNC_CF_SETUP(ch->id));
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start = HOST1X_SYNC_CF_SETUP_BASE_V(val);
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end = HOST1X_SYNC_CF_SETUP_LIMIT_V(val);
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do {
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host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
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host1x_sync_writel(host, HOST1X_SYNC_CFPEEK_CTRL_ENA_F(1) |
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HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(ch->id) |
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HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(rd_ptr),
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HOST1X_SYNC_CFPEEK_CTRL);
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val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_READ);
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if (!data_count) {
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host1x_debug_output(o, "%08x: ", val);
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data_count = show_channel_command(o, val, NULL);
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} else {
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host1x_debug_cont(o, "%08x%s", val,
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data_count > 1 ? ", " : "])\n");
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data_count--;
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}
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if (rd_ptr == end)
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rd_ptr = start;
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else
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rd_ptr++;
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} while (rd_ptr != wr_ptr);
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if (data_count)
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host1x_debug_cont(o, ", ...])\n");
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host1x_debug_output(o, "\n");
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host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
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}
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static void host1x_debug_show_mlocks(struct host1x *host, struct output *o)
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{
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unsigned int i;
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host1x_debug_output(o, "---- mlocks ----\n");
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for (i = 0; i < host1x_syncpt_nb_mlocks(host); i++) {
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u32 owner =
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host1x_sync_readl(host, HOST1X_SYNC_MLOCK_OWNER(i));
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if (HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(owner))
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host1x_debug_output(o, "%u: locked by channel %u\n",
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i, HOST1X_SYNC_MLOCK_OWNER_CHID_V(owner));
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else if (HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(owner))
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host1x_debug_output(o, "%u: locked by cpu\n", i);
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else
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host1x_debug_output(o, "%u: unlocked\n", i);
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}
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host1x_debug_output(o, "\n");
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}
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