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a1d5f18caf
Root Ports can generate several different interrupts using either MSI or MSI-X, but we only support that for MSI-X. Ports that support MSI but not MSI-X are currently limited to sharing a single interrupt. Rename pcie_port_enable_msix() to pcie_port_enable_irq_vec() and extend it to support multiple interrupts using either MSI-X (preferred) or MSI. Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> [bhelgaas: changelog, reword comments, simplify PME/hotplug no-MSI logic] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/*
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* File: portdrv.h
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* Purpose: PCI Express Port Bus Driver's Internal Data Structures
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*
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* Copyright (C) 2004 Intel
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* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
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*/
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#ifndef _PORTDRV_H_
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#define _PORTDRV_H_
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#include <linux/compiler.h>
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#define PCIE_PORT_DEVICE_MAXSERVICES 5
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/*
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* The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
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* be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
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* supports a maximum of 32 vectors per function.
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*/
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#define PCIE_PORT_MAX_MSI_ENTRIES 32
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#define get_descriptor_id(type, service) (((type - 4) << 8) | service)
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extern struct bus_type pcie_port_bus_type;
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int pcie_port_device_register(struct pci_dev *dev);
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#ifdef CONFIG_PM
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int pcie_port_device_suspend(struct device *dev);
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int pcie_port_device_resume(struct device *dev);
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#endif
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void pcie_port_device_remove(struct pci_dev *dev);
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int __must_check pcie_port_bus_register(void);
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void pcie_port_bus_unregister(void);
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struct pci_dev;
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void pcie_clear_root_pme_status(struct pci_dev *dev);
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#ifdef CONFIG_HOTPLUG_PCI_PCIE
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extern bool pciehp_msi_disabled;
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static inline bool pciehp_no_msi(void)
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{
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return pciehp_msi_disabled;
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}
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#else /* !CONFIG_HOTPLUG_PCI_PCIE */
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static inline bool pciehp_no_msi(void) { return false; }
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#endif /* !CONFIG_HOTPLUG_PCI_PCIE */
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#ifdef CONFIG_PCIE_PME
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extern bool pcie_pme_msi_disabled;
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static inline void pcie_pme_disable_msi(void)
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{
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pcie_pme_msi_disabled = true;
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}
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static inline bool pcie_pme_no_msi(void)
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{
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return pcie_pme_msi_disabled;
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}
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void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
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#else /* !CONFIG_PCIE_PME */
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static inline void pcie_pme_disable_msi(void) {}
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static inline bool pcie_pme_no_msi(void) { return false; }
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static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
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#endif /* !CONFIG_PCIE_PME */
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#ifdef CONFIG_ACPI
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void pcie_port_acpi_setup(struct pci_dev *port, int *mask);
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static inline void pcie_port_platform_notify(struct pci_dev *port, int *mask)
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{
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pcie_port_acpi_setup(port, mask);
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}
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#else /* !CONFIG_ACPI */
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static inline void pcie_port_platform_notify(struct pci_dev *port, int *mask){}
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#endif /* !CONFIG_ACPI */
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#endif /* _PORTDRV_H_ */
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