linux/arch/arm/mach-tegra
Dmitry Osipenko e4a680099a ARM: tegra: Re-add removed SoC id macro to tegra_resume()
Commit d127e9c ("ARM: tegra: make tegra_resume can work with current and later
chips") removed tegra_get_soc_id macro leaving used cpu register corrupted after
branching to v7_invalidate_l1() and as result causing execution of unintended
code on tegra20. Possibly it was expected that r6 would be SoC id func argument
since common cpu reset handler is setting r6 before branching to tegra_resume(),
but neither tegra20_lp1_reset() nor tegra30_lp1_reset() aren't setting r6
register before jumping to resume function. Fix it by re-adding macro.

Fixes: d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc: <stable@vger.kernel.org> # v3.13+
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-17 11:43:21 +01:00
..
board-paz00.c This is the bulk of GPIO changes for the v3.17 development 2014-08-08 18:00:35 -07:00
board.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
common.h Revert "ARM: tegra: add cpu_disable for hotplug" 2013-07-19 10:00:37 -06:00
cpuidle-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
cpuidle-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
cpuidle-tegra114.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
cpuidle.c ARM: tegra: Use a function to get the chip ID 2014-07-17 13:36:41 +02:00
cpuidle.h ARM: tegra: disable LP2 cpuidle state if PCIe is enabled 2013-08-13 12:07:56 -06:00
flowctrl.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
flowctrl.h ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
headsmp.S ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 2013-07-19 10:08:04 -06:00
hotplug.c ARM: tegra: Setup CPU hotplug in a pure initcall 2014-07-17 14:58:41 +02:00
io.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
iomap.h ARM: tegra: use section-sized static mappings for LPAE too 2013-12-04 12:25:25 -07:00
irammap.h ARM: tegra: move resume vector define to irammap.h 2013-09-17 13:44:22 -06:00
irq.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
irq.h ARM: tegra: irq: add wake up handling 2013-04-03 14:31:32 -06:00
Kconfig ARM: use menuconfig for sub-arch menus 2014-06-17 17:09:48 +02:00
Makefile ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
platsmp.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
reset-handler.S ARM: tegra: Re-add removed SoC id macro to tegra_resume() 2014-11-17 11:43:21 +01:00
reset.c ARM: tegra: Always lock the CPU reset vector 2014-07-17 14:58:42 +02:00
reset.h ARM: tegra: add common LP1 suspend support 2013-08-12 13:29:24 -06:00
sleep-tegra20.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
sleep-tegra30.S ARM: SoC cleanups for 3.17 2014-08-08 11:00:26 -07:00
sleep.h ARM: tegra: Setup CPU hotplug in a pure initcall 2014-07-17 14:58:41 +02:00
sleep.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
tegra.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00