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52d04d4081
When running without MIO support, with pci=nomio or for devices which
are not MIO-capable the zPCI subsystem generates pseudo-MMIO addresses
to allow access to PCI BARs via MMIO based Linux APIs even though the
platform uses function handles and BAR numbers.
This is done by stashing an index into our global IOMAP array which
contains the function handle in the 16 most significant bits of the
addresses returned by ioremap() always setting the most significant bit.
On the other hand the MIO addresses assigned by the platform for use,
while requiring special instructions, allow PCI access with virtually
mapped physical addresses. Now the problem is that these MIO addresses
and our own pseudo-MMIO addresses may overlap, while functionally this
would not be a problem by itself this overlap is detected by common code
as both address types are added as resources in the iomem_resource tree.
This leads to the overlapping resource claim of either the MIO capable
or non-MIO capable devices with being rejected.
Since PCI is tightly coupled to the use of the iomem_resource tree, see
for example the code for request_mem_region(), we can't reasonably get
rid of the overlap being detected by keeping our pseudo-MMIO addresses
out of the iomem_resource tree.
Instead let's move the range used by our own pseudo-MMIO addresses by
starting at (1UL << 62) and only using addresses below (1UL << 63) thus
avoiding the range currently used for MIO addresses.
Fixes: c7ff0e918a
("s390/pci: deal with devices that have no support for MIO instructions")
Cc: stable@vger.kernel.org # 5.3+
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
203 lines
4.2 KiB
C
203 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_S390_PCI_IO_H
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#define _ASM_S390_PCI_IO_H
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#ifdef CONFIG_PCI
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <asm/pci_insn.h>
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/* I/O size constraints */
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#define ZPCI_MAX_READ_SIZE 8
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#define ZPCI_MAX_WRITE_SIZE 128
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/* I/O Map */
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#define ZPCI_IOMAP_SHIFT 48
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#define ZPCI_IOMAP_ADDR_SHIFT 62
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#define ZPCI_IOMAP_ADDR_BASE (1UL << ZPCI_IOMAP_ADDR_SHIFT)
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#define ZPCI_IOMAP_ADDR_OFF_MASK ((1UL << ZPCI_IOMAP_SHIFT) - 1)
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#define ZPCI_IOMAP_MAX_ENTRIES \
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(1UL << (ZPCI_IOMAP_ADDR_SHIFT - ZPCI_IOMAP_SHIFT))
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#define ZPCI_IOMAP_ADDR_IDX_MASK \
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((ZPCI_IOMAP_ADDR_BASE - 1) & ~ZPCI_IOMAP_ADDR_OFF_MASK)
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struct zpci_iomap_entry {
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u32 fh;
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u8 bar;
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u16 count;
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};
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extern struct zpci_iomap_entry *zpci_iomap_start;
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#define ZPCI_ADDR(idx) (ZPCI_IOMAP_ADDR_BASE | ((u64) idx << ZPCI_IOMAP_SHIFT))
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#define ZPCI_IDX(addr) \
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(((__force u64) addr & ZPCI_IOMAP_ADDR_IDX_MASK) >> ZPCI_IOMAP_SHIFT)
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#define ZPCI_OFFSET(addr) \
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((__force u64) addr & ZPCI_IOMAP_ADDR_OFF_MASK)
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#define ZPCI_CREATE_REQ(handle, space, len) \
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((u64) handle << 32 | space << 16 | len)
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#define zpci_read(LENGTH, RETTYPE) \
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static inline RETTYPE zpci_read_##RETTYPE(const volatile void __iomem *addr) \
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{ \
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u64 data; \
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int rc; \
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\
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rc = zpci_load(&data, addr, LENGTH); \
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if (rc) \
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data = -1ULL; \
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return (RETTYPE) data; \
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}
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#define zpci_write(LENGTH, VALTYPE) \
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static inline void zpci_write_##VALTYPE(VALTYPE val, \
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const volatile void __iomem *addr) \
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{ \
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u64 data = (VALTYPE) val; \
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\
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zpci_store(addr, data, LENGTH); \
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}
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zpci_read(8, u64)
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zpci_read(4, u32)
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zpci_read(2, u16)
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zpci_read(1, u8)
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zpci_write(8, u64)
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zpci_write(4, u32)
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zpci_write(2, u16)
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zpci_write(1, u8)
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static inline int zpci_write_single(volatile void __iomem *dst, const void *src,
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unsigned long len)
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{
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u64 val;
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switch (len) {
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case 1:
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val = (u64) *((u8 *) src);
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break;
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case 2:
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val = (u64) *((u16 *) src);
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break;
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case 4:
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val = (u64) *((u32 *) src);
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break;
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case 8:
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val = (u64) *((u64 *) src);
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break;
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default:
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val = 0; /* let FW report error */
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break;
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}
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return zpci_store(dst, val, len);
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}
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static inline int zpci_read_single(void *dst, const volatile void __iomem *src,
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unsigned long len)
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{
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u64 data;
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int cc;
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cc = zpci_load(&data, src, len);
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if (cc)
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goto out;
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switch (len) {
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case 1:
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*((u8 *) dst) = (u8) data;
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break;
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case 2:
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*((u16 *) dst) = (u16) data;
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break;
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case 4:
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*((u32 *) dst) = (u32) data;
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break;
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case 8:
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*((u64 *) dst) = (u64) data;
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break;
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}
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out:
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return cc;
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}
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int zpci_write_block(volatile void __iomem *dst, const void *src,
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unsigned long len);
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static inline u8 zpci_get_max_write_size(u64 src, u64 dst, int len, int max)
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{
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int count = len > max ? max : len, size = 1;
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while (!(src & 0x1) && !(dst & 0x1) && ((size << 1) <= count)) {
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dst = dst >> 1;
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src = src >> 1;
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size = size << 1;
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}
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return size;
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}
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static inline int zpci_memcpy_fromio(void *dst,
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const volatile void __iomem *src,
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unsigned long n)
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{
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int size, rc = 0;
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) src,
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(u64) dst, n,
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ZPCI_MAX_READ_SIZE);
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rc = zpci_read_single(dst, src, size);
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if (rc)
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break;
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src += size;
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dst += size;
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n -= size;
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}
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return rc;
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}
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static inline int zpci_memcpy_toio(volatile void __iomem *dst,
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const void *src, unsigned long n)
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{
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int size, rc = 0;
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if (!src)
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return -EINVAL;
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) dst,
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(u64) src, n,
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ZPCI_MAX_WRITE_SIZE);
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if (size > 8) /* main path */
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rc = zpci_write_block(dst, src, size);
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else
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rc = zpci_write_single(dst, src, size);
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if (rc)
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break;
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src += size;
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dst += size;
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n -= size;
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}
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return rc;
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}
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static inline int zpci_memset_io(volatile void __iomem *dst,
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unsigned char val, size_t count)
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{
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u8 *src = kmalloc(count, GFP_KERNEL);
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int rc;
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if (src == NULL)
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return -ENOMEM;
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memset(src, val, count);
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rc = zpci_memcpy_toio(dst, src, count);
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kfree(src);
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return rc;
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}
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#endif /* CONFIG_PCI */
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#endif /* _ASM_S390_PCI_IO_H */
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