mirror of
https://github.com/torvalds/linux.git
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6fa52ed33b
This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRhKUsAAoJEIwa5zzehBx3Ug4P/RqEen15hxS/NY8SIVRAU5c0 G9ZiSPcLmvXGR/t1RZFeLWKaKOYRb2oW1EbXrlkddprkmg85RuQE/KMpCgzPPhVC Yrs8UaagMGblaLOjwavVjin/CUXZokRdMfsQoIyMGOezmVGFnv4d4Kt64IOf35DF 24vDv/QO0BAI9k6m6WLqlWvSshb0IkW8r2LneRLnMEAVop7b1xkOxz0sR6l0LWfV 6JAMXyTjJMg0t8uCVW/QyNdxcxINHhV4SYcNkzF3EZ7ol50OiJsT9fg0XW759+Wb vlX6Xuehg+CBOg+g3ZOZuR8JOEkOhAGRSzuJkk/TmLCCxc+ghnuYz8HArxh6GMHK KaxvogLIi0ZsD94A/BZIKkDtOLWlzdz2HBrYo9PTz8zrOz/gXhwQ3zq0jPccC5E0 S+YYiobCBXepknF9301ti7wGD9VDzI8nmqOKG6tEBrD3xuO+RoBv+z4pBugN4/1C DlB19gOz60G5kniziL+wlmWER2qXmYrQZqS+s6+B2XoyoETC0Yij3Rck5vyC6qIK A2sni+Y9rzNOB9nzmnISP/UiGUffCy8AV4DZJjMSl0XkF4cpOXqRVGZ2nGB4tR5q GTOETcDCo5dvMDKX7Wfrz40CQzO39tnPCddg3OIS93ZwMpCeykIlb1FVL7RcsyF7 3uikzYHlDo3C5pvtJ5TS =ZWk9 -----END PGP SIGNATURE----- Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (256 commits) irqchip: s3c24xx: add missing __init annotations ARM: dts: Disable the RTC by default on exynos5 clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3} ARM: exynos: restore mach/regs-clock.h for exynos5 clocksource: exynos_mct: fix build error on non-DT pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register() irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure reset: NULL deref on allocation failure reset: Add reset controller API dt: describe base reset signal binding ARM: EXYNOS: Add arm-pmu DT binding for exynos421x ARM: EXYNOS: Add arm-pmu DT binding for exynos5250 ARM: EXYNOS: Enable PMUs for exynos4 irqchip: exynos-combiner: Correct combined IRQs for exynos4 irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq ARM: EXYNOS: fix compilation error introduced due to common clock migration clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} clk: exynos4: export clocks required for fimc-is clk: samsung: Fix compilation error clk: tegra: fix enum tegra114_clk to match binding ...
680 lines
18 KiB
C
680 lines
18 KiB
C
/*
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* Copyright (C) 2009 Integration Software and Electronic Engineering.
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*
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* Modified from mach-omap2/board-generic.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/input.h>
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#include <linux/usb/phy.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <linux/i2c/twl.h>
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#include <linux/mmc/host.h>
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#include <linux/mtd/nand.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <video/omapdss.h>
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#include <video/omap-panel-data.h>
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#include <linux/platform_data/mtd-onenand-omap2.h>
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#include "common.h"
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#include "gpmc.h"
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#include "mux.h"
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#include "hsmmc.h"
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#include "sdram-numonyx-m65kxxxxam.h"
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#include "common-board-devices.h"
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#include "board-flash.h"
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#include "control.h"
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#include "gpmc-onenand.h"
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#define IGEP2_SMSC911X_CS 5
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#define IGEP2_SMSC911X_GPIO 176
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#define IGEP2_GPIO_USBH_NRESET 24
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#define IGEP2_GPIO_LED0_GREEN 26
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#define IGEP2_GPIO_LED0_RED 27
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#define IGEP2_GPIO_LED1_RED 28
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#define IGEP2_GPIO_DVI_PUP 170
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#define IGEP2_RB_GPIO_WIFI_NPD 94
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#define IGEP2_RB_GPIO_WIFI_NRESET 95
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#define IGEP2_RB_GPIO_BT_NRESET 137
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#define IGEP2_RC_GPIO_WIFI_NPD 138
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#define IGEP2_RC_GPIO_WIFI_NRESET 139
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#define IGEP2_RC_GPIO_BT_NRESET 137
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#define IGEP3_GPIO_LED0_GREEN 54
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#define IGEP3_GPIO_LED0_RED 53
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#define IGEP3_GPIO_LED1_RED 16
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#define IGEP3_GPIO_USBH_NRESET 183
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#define IGEP_SYSBOOT_MASK 0x1f
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#define IGEP_SYSBOOT_NAND 0x0f
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#define IGEP_SYSBOOT_ONENAND 0x10
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/*
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* IGEP2 Hardware Revision Table
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*
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* --------------------------------------------------------------------------
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* | Id. | Hw Rev. | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET |
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* --------------------------------------------------------------------------
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* | 0 | B | high | gpio94 | gpio95 | - |
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* | 0 | B/C (B-compatible) | high | gpio94 | gpio95 | gpio137 |
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* | 1 | C | low | gpio138 | gpio139 | gpio137 |
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* --------------------------------------------------------------------------
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*/
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#define IGEP2_BOARD_HWREV_B 0
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#define IGEP2_BOARD_HWREV_C 1
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#define IGEP3_BOARD_HWREV 2
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static u8 hwrev;
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static void __init igep2_get_revision(void)
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{
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u8 ret;
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if (machine_is_igep0030()) {
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hwrev = IGEP3_BOARD_HWREV;
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return;
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}
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omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT);
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if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) {
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pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n");
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pr_err("IGEP2: Unknown Hardware Revision\n");
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return;
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}
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ret = gpio_get_value(IGEP2_GPIO_LED1_RED);
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if (ret == 0) {
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pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n");
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hwrev = IGEP2_BOARD_HWREV_C;
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} else if (ret == 1) {
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pr_info("IGEP2: Hardware Revision B/C (B compatible)\n");
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hwrev = IGEP2_BOARD_HWREV_B;
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} else {
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pr_err("IGEP2: Unknown Hardware Revision\n");
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hwrev = -1;
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}
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gpio_free(IGEP2_GPIO_LED1_RED);
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}
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#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
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defined(CONFIG_MTD_NAND_OMAP2) || \
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defined(CONFIG_MTD_NAND_OMAP2_MODULE)
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#define ONENAND_MAP 0x20000000
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/* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
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* Since the device is equipped with two DataRAMs, and two-plane NAND
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* Flash memory array, these two component enables simultaneous program
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* of 4KiB. Plane1 has only even blocks such as block0, block2, block4
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* while Plane2 has only odd blocks such as block1, block3, block5.
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* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
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*/
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static struct mtd_partition igep_flash_partitions[] = {
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{
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.name = "X-Loader",
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.offset = 0,
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.size = 2 * (64*(2*2048))
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},
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{
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.name = "U-Boot",
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.offset = MTDPART_OFS_APPEND,
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.size = 6 * (64*(2*2048)),
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},
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{
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.name = "Environment",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * (64*(2*2048)),
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},
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{
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.name = "Kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 12 * (64*(2*2048)),
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},
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{
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.name = "File System",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static inline u32 igep_get_sysboot_value(void)
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{
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return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) & IGEP_SYSBOOT_MASK;
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}
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static void __init igep_flash_init(void)
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{
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u32 mux;
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mux = igep_get_sysboot_value();
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if (mux == IGEP_SYSBOOT_NAND) {
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pr_info("IGEP: initializing NAND memory device\n");
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board_nand_init(igep_flash_partitions,
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ARRAY_SIZE(igep_flash_partitions),
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0, NAND_BUSWIDTH_16, nand_default_timings);
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} else if (mux == IGEP_SYSBOOT_ONENAND) {
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pr_info("IGEP: initializing OneNAND memory device\n");
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board_onenand_init(igep_flash_partitions,
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ARRAY_SIZE(igep_flash_partitions), 0);
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} else {
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pr_err("IGEP: Flash: unsupported sysboot sequence found\n");
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}
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}
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#else
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static void __init igep_flash_init(void) {}
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#endif
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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#include <linux/smsc911x.h>
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#include "gpmc-smsc911x.h"
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static struct omap_smsc911x_platform_data smsc911x_cfg = {
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.cs = IGEP2_SMSC911X_CS,
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.gpio_irq = IGEP2_SMSC911X_GPIO,
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.gpio_reset = -EINVAL,
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.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
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};
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static inline void __init igep2_init_smsc911x(void)
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{
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gpmc_smsc911x_init(&smsc911x_cfg);
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}
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#else
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static inline void __init igep2_init_smsc911x(void) { }
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#endif
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static struct regulator_consumer_supply igep_vmmc1_supply[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
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};
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/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
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static struct regulator_init_data igep_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply),
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.consumer_supplies = igep_vmmc1_supply,
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};
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static struct regulator_consumer_supply igep_vio_supply[] = {
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REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
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};
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static struct regulator_init_data igep_vio = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.apply_uV = 1,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(igep_vio_supply),
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.consumer_supplies = igep_vio_supply,
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};
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static struct regulator_consumer_supply igep_vmmc2_supply[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
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};
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static struct regulator_init_data igep_vmmc2 = {
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.constraints = {
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.valid_modes_mask = REGULATOR_MODE_NORMAL,
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.always_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply),
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.consumer_supplies = igep_vmmc2_supply,
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};
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static struct fixed_voltage_config igep_vwlan = {
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.supply_name = "vwlan",
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.microvolts = 3300000,
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.gpio = -EINVAL,
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.enabled_at_boot = 1,
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.init_data = &igep_vmmc2,
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};
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static struct platform_device igep_vwlan_device = {
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.name = "reg-fixed-voltage",
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.id = 0,
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.dev = {
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.platform_data = &igep_vwlan,
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},
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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.deferred = true,
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},
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#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
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{
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.mmc = 2,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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},
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#endif
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{} /* Terminator */
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};
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#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
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#include <linux/leds.h>
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static struct gpio_led igep_gpio_leds[] = {
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[0] = {
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.name = "omap3:red:user0",
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.default_state = 0,
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},
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[1] = {
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.name = "omap3:green:boot",
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.default_state = 1,
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},
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[2] = {
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.name = "omap3:red:user1",
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.default_state = 0,
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},
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[3] = {
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.name = "omap3:green:user1",
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.default_state = 0,
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.gpio = -EINVAL, /* gets replaced */
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.active_low = 1,
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},
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};
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static struct gpio_led_platform_data igep_led_pdata = {
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.leds = igep_gpio_leds,
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.num_leds = ARRAY_SIZE(igep_gpio_leds),
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};
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static struct platform_device igep_led_device = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &igep_led_pdata,
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},
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};
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static void __init igep_leds_init(void)
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{
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if (machine_is_igep0020()) {
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igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED;
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igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN;
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igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED;
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} else {
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igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED;
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igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN;
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igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED;
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}
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platform_device_register(&igep_led_device);
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}
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#else
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static struct gpio igep_gpio_leds[] __initdata = {
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{ -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d0" },
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{ -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:green:d0" },
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{ -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d1" },
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};
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static inline void igep_leds_init(void)
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{
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int i;
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if (machine_is_igep0020()) {
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igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED;
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igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN;
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igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED;
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} else {
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igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED;
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igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN;
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igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED;
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}
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if (gpio_request_array(igep_gpio_leds, ARRAY_SIZE(igep_gpio_leds))) {
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pr_warning("IGEP v2: Could not obtain leds gpios\n");
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(igep_gpio_leds); i++)
|
|
gpio_export(igep_gpio_leds[i].gpio, 0);
|
|
}
|
|
#endif
|
|
|
|
static struct gpio igep2_twl_gpios[] = {
|
|
{ -EINVAL, GPIOF_IN, "GPIO_EHCI_NOC" },
|
|
{ -EINVAL, GPIOF_OUT_INIT_LOW, "GPIO_USBH_CPEN" },
|
|
};
|
|
|
|
static int igep_twl_gpio_setup(struct device *dev,
|
|
unsigned gpio, unsigned ngpio)
|
|
{
|
|
int ret;
|
|
|
|
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
|
|
mmc[0].gpio_cd = gpio + 0;
|
|
omap_hsmmc_late_init(mmc);
|
|
|
|
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
|
|
#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
|
|
ret = gpio_request_one(gpio + TWL4030_GPIO_MAX + 1, GPIOF_OUT_INIT_HIGH,
|
|
"gpio-led:green:d1");
|
|
if (ret == 0)
|
|
gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0);
|
|
else
|
|
pr_warning("IGEP: Could not obtain gpio GPIO_LED1_GREEN\n");
|
|
#else
|
|
igep_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
|
#endif
|
|
|
|
if (machine_is_igep0030())
|
|
return 0;
|
|
|
|
/*
|
|
* REVISIT: need ehci-omap hooks for external VBUS
|
|
* power switch and overcurrent detect
|
|
*/
|
|
igep2_twl_gpios[0].gpio = gpio + 1;
|
|
|
|
/* TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN (out, active low) */
|
|
igep2_twl_gpios[1].gpio = gpio + TWL4030_GPIO_MAX;
|
|
|
|
ret = gpio_request_array(igep2_twl_gpios, ARRAY_SIZE(igep2_twl_gpios));
|
|
if (ret < 0)
|
|
pr_err("IGEP2: Could not obtain gpio for USBH_CPEN");
|
|
|
|
return 0;
|
|
};
|
|
|
|
static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
|
|
.use_leds = true,
|
|
.setup = igep_twl_gpio_setup,
|
|
};
|
|
|
|
static struct tfp410_platform_data dvi_panel = {
|
|
.i2c_bus_num = 3,
|
|
.power_down_gpio = IGEP2_GPIO_DVI_PUP,
|
|
};
|
|
|
|
static struct omap_dss_device igep2_dvi_device = {
|
|
.type = OMAP_DISPLAY_TYPE_DPI,
|
|
.name = "dvi",
|
|
.driver_name = "tfp410",
|
|
.data = &dvi_panel,
|
|
.phy.dpi.data_lines = 24,
|
|
};
|
|
|
|
static struct omap_dss_device *igep2_dss_devices[] = {
|
|
&igep2_dvi_device
|
|
};
|
|
|
|
static struct omap_dss_board_info igep2_dss_data = {
|
|
.num_devices = ARRAY_SIZE(igep2_dss_devices),
|
|
.devices = igep2_dss_devices,
|
|
.default_device = &igep2_dvi_device,
|
|
};
|
|
|
|
static struct platform_device *igep_devices[] __initdata = {
|
|
&igep_vwlan_device,
|
|
};
|
|
|
|
static int igep2_keymap[] = {
|
|
KEY(0, 0, KEY_LEFT),
|
|
KEY(0, 1, KEY_RIGHT),
|
|
KEY(0, 2, KEY_A),
|
|
KEY(0, 3, KEY_B),
|
|
KEY(1, 0, KEY_DOWN),
|
|
KEY(1, 1, KEY_UP),
|
|
KEY(1, 2, KEY_E),
|
|
KEY(1, 3, KEY_F),
|
|
KEY(2, 0, KEY_ENTER),
|
|
KEY(2, 1, KEY_I),
|
|
KEY(2, 2, KEY_J),
|
|
KEY(2, 3, KEY_K),
|
|
KEY(3, 0, KEY_M),
|
|
KEY(3, 1, KEY_N),
|
|
KEY(3, 2, KEY_O),
|
|
KEY(3, 3, KEY_P)
|
|
};
|
|
|
|
static struct matrix_keymap_data igep2_keymap_data = {
|
|
.keymap = igep2_keymap,
|
|
.keymap_size = ARRAY_SIZE(igep2_keymap),
|
|
};
|
|
|
|
static struct twl4030_keypad_data igep2_keypad_pdata = {
|
|
.keymap_data = &igep2_keymap_data,
|
|
.rows = 4,
|
|
.cols = 4,
|
|
.rep = 1,
|
|
};
|
|
|
|
static struct twl4030_platform_data igep_twldata = {
|
|
/* platform_data for children goes here */
|
|
.gpio = &igep_twl4030_gpio_pdata,
|
|
.vmmc1 = &igep_vmmc1,
|
|
.vio = &igep_vio,
|
|
};
|
|
|
|
static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = {
|
|
{
|
|
I2C_BOARD_INFO("eeprom", 0x50),
|
|
},
|
|
};
|
|
|
|
static void __init igep_i2c_init(void)
|
|
{
|
|
int ret;
|
|
|
|
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB,
|
|
TWL_COMMON_REGULATOR_VPLL2);
|
|
igep_twldata.vpll2->constraints.apply_uV = true;
|
|
igep_twldata.vpll2->constraints.name = "VDVI";
|
|
|
|
if (machine_is_igep0020()) {
|
|
/*
|
|
* Bus 3 is attached to the DVI port where devices like the
|
|
* pico DLP projector don't work reliably with 400kHz
|
|
*/
|
|
ret = omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo,
|
|
ARRAY_SIZE(igep2_i2c3_boardinfo));
|
|
if (ret)
|
|
pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
|
|
|
|
igep_twldata.keypad = &igep2_keypad_pdata;
|
|
/* Get common pmic data */
|
|
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0);
|
|
}
|
|
|
|
omap3_pmic_init("twl4030", &igep_twldata);
|
|
}
|
|
|
|
static struct usbhs_phy_data igep2_phy_data[] __initdata = {
|
|
{
|
|
.port = 1,
|
|
.reset_gpio = IGEP2_GPIO_USBH_NRESET,
|
|
.vcc_gpio = -EINVAL,
|
|
},
|
|
};
|
|
|
|
static struct usbhs_phy_data igep3_phy_data[] __initdata = {
|
|
{
|
|
.port = 2,
|
|
.reset_gpio = IGEP3_GPIO_USBH_NRESET,
|
|
.vcc_gpio = -EINVAL,
|
|
},
|
|
};
|
|
|
|
static struct usbhs_omap_platform_data igep2_usbhs_bdata __initdata = {
|
|
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
|
|
};
|
|
|
|
static struct usbhs_omap_platform_data igep3_usbhs_bdata __initdata = {
|
|
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
|
};
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
static struct omap_board_mux board_mux[] __initdata = {
|
|
/* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
|
|
OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
|
|
static struct gpio igep_wlan_bt_gpios[] __initdata = {
|
|
{ -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NPD" },
|
|
{ -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NRESET" },
|
|
{ -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_BT_NRESET" },
|
|
};
|
|
|
|
static void __init igep_wlan_bt_init(void)
|
|
{
|
|
int err;
|
|
|
|
/* GPIO's for WLAN-BT combo depends on hardware revision */
|
|
if (hwrev == IGEP2_BOARD_HWREV_B) {
|
|
igep_wlan_bt_gpios[0].gpio = IGEP2_RB_GPIO_WIFI_NPD;
|
|
igep_wlan_bt_gpios[1].gpio = IGEP2_RB_GPIO_WIFI_NRESET;
|
|
igep_wlan_bt_gpios[2].gpio = IGEP2_RB_GPIO_BT_NRESET;
|
|
} else if (hwrev == IGEP2_BOARD_HWREV_C || machine_is_igep0030()) {
|
|
igep_wlan_bt_gpios[0].gpio = IGEP2_RC_GPIO_WIFI_NPD;
|
|
igep_wlan_bt_gpios[1].gpio = IGEP2_RC_GPIO_WIFI_NRESET;
|
|
igep_wlan_bt_gpios[2].gpio = IGEP2_RC_GPIO_BT_NRESET;
|
|
} else
|
|
return;
|
|
|
|
/* Make sure that the GPIO pins are muxed correctly */
|
|
omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
|
|
omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
|
|
omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
|
|
|
|
err = gpio_request_array(igep_wlan_bt_gpios,
|
|
ARRAY_SIZE(igep_wlan_bt_gpios));
|
|
if (err) {
|
|
pr_warning("IGEP2: Could not obtain WIFI/BT gpios\n");
|
|
return;
|
|
}
|
|
|
|
gpio_export(igep_wlan_bt_gpios[0].gpio, 0);
|
|
gpio_export(igep_wlan_bt_gpios[1].gpio, 0);
|
|
gpio_export(igep_wlan_bt_gpios[2].gpio, 0);
|
|
|
|
gpio_set_value(igep_wlan_bt_gpios[1].gpio, 0);
|
|
udelay(10);
|
|
gpio_set_value(igep_wlan_bt_gpios[1].gpio, 1);
|
|
|
|
}
|
|
#else
|
|
static inline void __init igep_wlan_bt_init(void) { }
|
|
#endif
|
|
|
|
static struct regulator_consumer_supply dummy_supplies[] = {
|
|
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
|
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
|
};
|
|
|
|
static void __init igep_init(void)
|
|
{
|
|
regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
|
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
|
|
|
/* Get IGEP2 hardware revision */
|
|
igep2_get_revision();
|
|
|
|
omap_hsmmc_init(mmc);
|
|
|
|
/* Register I2C busses and drivers */
|
|
igep_i2c_init();
|
|
platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices));
|
|
omap_serial_init();
|
|
omap_sdrc_init(m65kxxxxam_sdrc_params,
|
|
m65kxxxxam_sdrc_params);
|
|
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
|
usb_musb_init(NULL);
|
|
|
|
igep_flash_init();
|
|
igep_leds_init();
|
|
omap_twl4030_audio_init("igep2", NULL);
|
|
|
|
/*
|
|
* WLAN-BT combo module from MuRata which has a Marvell WLAN
|
|
* (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
|
|
*/
|
|
igep_wlan_bt_init();
|
|
|
|
if (machine_is_igep0020()) {
|
|
omap_display_init(&igep2_dss_data);
|
|
igep2_init_smsc911x();
|
|
usbhs_init_phys(igep2_phy_data, ARRAY_SIZE(igep2_phy_data));
|
|
usbhs_init(&igep2_usbhs_bdata);
|
|
} else {
|
|
usbhs_init_phys(igep3_phy_data, ARRAY_SIZE(igep3_phy_data));
|
|
usbhs_init(&igep3_usbhs_bdata);
|
|
}
|
|
}
|
|
|
|
MACHINE_START(IGEP0020, "IGEP v2 board")
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap35xx_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.handle_irq = omap3_intc_handle_irq,
|
|
.init_machine = igep_init,
|
|
.init_late = omap35xx_init_late,
|
|
.init_time = omap3_sync32k_timer_init,
|
|
.restart = omap3xxx_restart,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap35xx_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.handle_irq = omap3_intc_handle_irq,
|
|
.init_machine = igep_init,
|
|
.init_late = omap35xx_init_late,
|
|
.init_time = omap3_sync32k_timer_init,
|
|
.restart = omap3xxx_restart,
|
|
MACHINE_END
|