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Update binding document for MSM8996. CC: Rob Herring <robh+dt@kernel.org> CC: Mark Rutland <mark.rutland@arm.com> CC: devicetree@vger.kernel.org Signed-off-by: Todor Tomov <todor.tomov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hansverk@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
230 lines
5.4 KiB
Plaintext
230 lines
5.4 KiB
Plaintext
Qualcomm Camera Subsystem
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* Properties
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- compatible:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain one of:
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- "qcom,msm8916-camss"
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- "qcom,msm8996-camss"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Register ranges as listed in the reg-names property.
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- reg-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain the following entries:
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- "csiphy0"
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- "csiphy0_clk_mux"
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- "csiphy1"
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- "csiphy1_clk_mux"
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- "csiphy2" (8996 only)
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- "csiphy2_clk_mux" (8996 only)
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- "csid0"
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- "csid1"
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- "csid2" (8996 only)
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- "csid3" (8996 only)
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- "ispif"
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- "csi_clk_mux"
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- "vfe0"
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- "vfe1" (8996 only)
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Interrupts as listed in the interrupt-names property.
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- interrupt-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain the following entries:
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- "csiphy0"
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- "csiphy1"
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- "csiphy2" (8996 only)
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- "csid0"
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- "csid1"
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- "csid2" (8996 only)
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- "csid3" (8996 only)
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- "ispif"
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- "vfe0"
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- "vfe1" (8996 only)
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- power-domains:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A phandle and power domain specifier pairs to the
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power domain which is responsible for collapsing
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and restoring power to the peripheral.
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- clocks:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A list of phandle and clock specifier pairs as listed
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in clock-names property.
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- clock-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain the following entries:
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- "top_ahb"
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- "ispif_ahb"
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- "csiphy0_timer"
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- "csiphy1_timer"
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- "csiphy2_timer" (8996 only)
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- "csi0_ahb"
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- "csi0"
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- "csi0_phy"
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- "csi0_pix"
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- "csi0_rdi"
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- "csi1_ahb"
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- "csi1"
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- "csi1_phy"
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- "csi1_pix"
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- "csi1_rdi"
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- "csi2_ahb" (8996 only)
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- "csi2" (8996 only)
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- "csi2_phy" (8996 only)
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- "csi2_pix" (8996 only)
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- "csi2_rdi" (8996 only)
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- "csi3_ahb" (8996 only)
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- "csi3" (8996 only)
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- "csi3_phy" (8996 only)
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- "csi3_pix" (8996 only)
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- "csi3_rdi" (8996 only)
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- "ahb"
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- "vfe0"
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- "csi_vfe0"
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- "vfe0_ahb", (8996 only)
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- "vfe0_stream", (8996 only)
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- "vfe1", (8996 only)
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- "csi_vfe1", (8996 only)
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- "vfe1_ahb", (8996 only)
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- "vfe1_stream", (8996 only)
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- "vfe_ahb"
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- "vfe_axi"
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- vdda-supply:
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Usage: required
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Value type: <phandle>
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Definition: A phandle to voltage supply for CSI2.
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- iommus:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A list of phandle and IOMMU specifier pairs.
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* Nodes
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- ports:
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Usage: required
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Definition: As described in video-interfaces.txt in same directory.
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Properties:
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- reg:
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Usage: required
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Value type: <u32>
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Definition: Selects CSI2 PHY interface - PHY0, PHY1
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or PHY2 (8996 only)
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Endpoint node properties:
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- clock-lanes:
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Usage: required
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Value type: <u32>
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Definition: The physical clock lane index. On 8916
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the value must always be <1> as the physical
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clock lane is lane 1. On 8996 the value must
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always be <7> as the hardware supports D-PHY
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and C-PHY, indexes are in a common set and
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D-PHY physical clock lane is labeled as 7.
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- data-lanes:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: An array of physical data lanes indexes.
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Position of an entry determines the logical
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lane number, while the value of an entry
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indicates physical lane index. Lane swapping
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is supported. Physical lane indexes for
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8916: 0, 2, 3, 4; for 8996: 0, 1, 2, 3.
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* An Example
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camss: camss@1b00000 {
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compatible = "qcom,msm8916-camss";
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reg = <0x1b0ac00 0x200>,
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<0x1b00030 0x4>,
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<0x1b0b000 0x200>,
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<0x1b00038 0x4>,
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<0x1b08000 0x100>,
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<0x1b08400 0x100>,
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<0x1b0a000 0x500>,
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<0x1b00020 0x10>,
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<0x1b10000 0x1000>;
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reg-names = "csiphy0",
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"csiphy0_clk_mux",
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"csiphy1",
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"csiphy1_clk_mux",
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"csid0",
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"csid1",
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"ispif",
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"csi_clk_mux",
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"vfe0";
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interrupts = <GIC_SPI 78 0>,
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<GIC_SPI 79 0>,
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<GIC_SPI 51 0>,
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<GIC_SPI 52 0>,
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<GIC_SPI 55 0>,
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<GIC_SPI 57 0>;
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interrupt-names = "csiphy0",
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"csiphy1",
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"csid0",
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"csid1",
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"ispif",
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"vfe0";
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power-domains = <&gcc VFE_GDSC>;
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clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
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<&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
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<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
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<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
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<&gcc GCC_CAMSS_CSI0_AHB_CLK>,
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<&gcc GCC_CAMSS_CSI0_CLK>,
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<&gcc GCC_CAMSS_CSI0PHY_CLK>,
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<&gcc GCC_CAMSS_CSI0PIX_CLK>,
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<&gcc GCC_CAMSS_CSI0RDI_CLK>,
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<&gcc GCC_CAMSS_CSI1_AHB_CLK>,
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<&gcc GCC_CAMSS_CSI1_CLK>,
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<&gcc GCC_CAMSS_CSI1PHY_CLK>,
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<&gcc GCC_CAMSS_CSI1PIX_CLK>,
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<&gcc GCC_CAMSS_CSI1RDI_CLK>,
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<&gcc GCC_CAMSS_AHB_CLK>,
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<&gcc GCC_CAMSS_VFE0_CLK>,
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<&gcc GCC_CAMSS_CSI_VFE0_CLK>,
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<&gcc GCC_CAMSS_VFE_AHB_CLK>,
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<&gcc GCC_CAMSS_VFE_AXI_CLK>;
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clock-names = "top_ahb",
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"ispif_ahb",
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"csiphy0_timer",
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"csiphy1_timer",
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"csi0_ahb",
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"csi0",
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"csi0_phy",
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"csi0_pix",
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"csi0_rdi",
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"csi1_ahb",
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"csi1",
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"csi1_phy",
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"csi1_pix",
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"csi1_rdi",
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"ahb",
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"vfe0",
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"csi_vfe0",
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"vfe_ahb",
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"vfe_axi";
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vdda-supply = <&pm8916_l2>;
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iommus = <&apps_iommu 3>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csiphy0_ep: endpoint {
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clock-lanes = <1>;
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data-lanes = <0 2>;
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remote-endpoint = <&ov5645_ep>;
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};
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};
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};
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};
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