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42f03ab3c7
As for today HSDK reset driver implements only .reset() callback.
In case of driver which implements one of standard
reset controller usage pattern
(call *_deassert() in probe(), call *_assert() in remove())
that leads to inoperability of this reset driver.
Improve HSDK reset driver by calling .reset() callback inside of
.deassert() callback to avoid each reset controller
user adaptation for work with both reset methods
(reset() and {.assert() & .deassert()} pair)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
139 lines
3.5 KiB
C
139 lines
3.5 KiB
C
/*
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* Copyright (C) 2017 Synopsys.
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*
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* Synopsys HSDK Development platform reset driver.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#define to_hsdk_rst(p) container_of((p), struct hsdk_rst, rcdev)
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struct hsdk_rst {
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void __iomem *regs_ctl;
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void __iomem *regs_rst;
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spinlock_t lock;
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struct reset_controller_dev rcdev;
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};
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static const u32 rst_map[] = {
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BIT(16), /* APB_RST */
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BIT(17), /* AXI_RST */
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BIT(18), /* ETH_RST */
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BIT(19), /* USB_RST */
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BIT(20), /* SDIO_RST */
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BIT(21), /* HDMI_RST */
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BIT(22), /* GFX_RST */
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BIT(25), /* DMAC_RST */
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BIT(31), /* EBI_RST */
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};
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#define HSDK_MAX_RESETS ARRAY_SIZE(rst_map)
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#define CGU_SYS_RST_CTRL 0x0
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#define CGU_IP_SW_RESET 0x0
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#define CGU_IP_SW_RESET_DELAY_SHIFT 16
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#define CGU_IP_SW_RESET_DELAY_MASK GENMASK(31, CGU_IP_SW_RESET_DELAY_SHIFT)
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#define CGU_IP_SW_RESET_DELAY 0
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#define CGU_IP_SW_RESET_RESET BIT(0)
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#define SW_RESET_TIMEOUT 10000
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static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id)
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{
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writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL);
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}
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static int hsdk_reset_do(struct hsdk_rst *rst)
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{
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u32 reg;
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reg = readl(rst->regs_rst + CGU_IP_SW_RESET);
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reg &= ~CGU_IP_SW_RESET_DELAY_MASK;
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reg |= CGU_IP_SW_RESET_DELAY << CGU_IP_SW_RESET_DELAY_SHIFT;
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reg |= CGU_IP_SW_RESET_RESET;
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writel(reg, rst->regs_rst + CGU_IP_SW_RESET);
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/* wait till reset bit is back to 0 */
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return readl_poll_timeout_atomic(rst->regs_rst + CGU_IP_SW_RESET, reg,
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!(reg & CGU_IP_SW_RESET_RESET), 5, SW_RESET_TIMEOUT);
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}
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static int hsdk_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct hsdk_rst *rst = to_hsdk_rst(rcdev);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&rst->lock, flags);
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hsdk_reset_config(rst, id);
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ret = hsdk_reset_do(rst);
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spin_unlock_irqrestore(&rst->lock, flags);
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return ret;
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}
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static const struct reset_control_ops hsdk_reset_ops = {
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.reset = hsdk_reset_reset,
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.deassert = hsdk_reset_reset,
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};
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static int hsdk_reset_probe(struct platform_device *pdev)
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{
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struct hsdk_rst *rst;
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struct resource *mem;
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rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL);
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if (!rst)
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return -ENOMEM;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rst->regs_ctl = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(rst->regs_ctl))
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return PTR_ERR(rst->regs_ctl);
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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rst->regs_rst = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(rst->regs_rst))
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return PTR_ERR(rst->regs_rst);
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spin_lock_init(&rst->lock);
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rst->rcdev.owner = THIS_MODULE;
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rst->rcdev.ops = &hsdk_reset_ops;
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rst->rcdev.of_node = pdev->dev.of_node;
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rst->rcdev.nr_resets = HSDK_MAX_RESETS;
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rst->rcdev.of_reset_n_cells = 1;
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return reset_controller_register(&rst->rcdev);
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}
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static const struct of_device_id hsdk_reset_dt_match[] = {
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{ .compatible = "snps,hsdk-reset" },
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{ },
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};
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static struct platform_driver hsdk_reset_driver = {
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.probe = hsdk_reset_probe,
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.driver = {
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.name = "hsdk-reset",
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.of_match_table = hsdk_reset_dt_match,
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},
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};
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builtin_platform_driver(hsdk_reset_driver);
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MODULE_AUTHOR("Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>");
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MODULE_DESCRIPTION("Synopsys HSDK SDP reset driver");
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MODULE_LICENSE("GPL v2");
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