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f746ab0bac
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: a9e9c7153e
("iio: adc: add max1117/max1118/max1119 ADC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-26-jic23@kernel.org
289 lines
6.4 KiB
C
289 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs driver
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*
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* Copyright (c) 2017 Akinobu Mita <akinobu.mita@gmail.com>
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*
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* Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1117-MAX1119.pdf
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*
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* SPI interface connections
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*
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* SPI MAXIM
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* Master Direction MAX1117/8/9
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* ------ --------- -----------
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* nCS --> CNVST
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* SCK --> SCLK
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* MISO <-- DOUT
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* ------ --------- -----------
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*/
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/regulator/consumer.h>
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enum max1118_id {
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max1117,
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max1118,
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max1119,
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};
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struct max1118 {
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struct spi_device *spi;
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struct mutex lock;
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struct regulator *reg;
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/* Ensure natural alignment of buffer elements */
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struct {
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u8 channels[2];
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s64 ts __aligned(8);
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} scan;
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u8 data __aligned(IIO_DMA_MINALIGN);
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};
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#define MAX1118_CHANNEL(ch) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (ch), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.scan_index = ch, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 8, \
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.storagebits = 8, \
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}, \
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}
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static const struct iio_chan_spec max1118_channels[] = {
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MAX1118_CHANNEL(0),
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MAX1118_CHANNEL(1),
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IIO_CHAN_SOFT_TIMESTAMP(2),
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};
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static int max1118_read(struct iio_dev *indio_dev, int channel)
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{
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struct max1118 *adc = iio_priv(indio_dev);
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struct spi_transfer xfers[] = {
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/*
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* To select CH1 for conversion, CNVST pin must be brought high
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* and low for a second time.
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*/
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{
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.len = 0,
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.delay = { /* > CNVST Low Time 100 ns */
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.value = 1,
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.unit = SPI_DELAY_UNIT_USECS
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},
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.cs_change = 1,
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},
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/*
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* The acquisition interval begins with the falling edge of
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* CNVST. The total acquisition and conversion process takes
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* <7.5us.
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*/
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{
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.len = 0,
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.delay = {
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.value = 8,
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.unit = SPI_DELAY_UNIT_USECS
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},
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},
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{
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.rx_buf = &adc->data,
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.len = 1,
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},
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};
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int ret;
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if (channel == 0)
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ret = spi_sync_transfer(adc->spi, xfers + 1, 2);
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else
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ret = spi_sync_transfer(adc->spi, xfers, 3);
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if (ret)
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return ret;
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return adc->data;
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}
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static int max1118_get_vref_mV(struct iio_dev *indio_dev)
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{
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struct max1118 *adc = iio_priv(indio_dev);
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const struct spi_device_id *id = spi_get_device_id(adc->spi);
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int vref_uV;
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switch (id->driver_data) {
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case max1117:
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return 2048;
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case max1119:
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return 4096;
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case max1118:
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vref_uV = regulator_get_voltage(adc->reg);
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if (vref_uV < 0)
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return vref_uV;
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return vref_uV / 1000;
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}
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return -ENODEV;
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}
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static int max1118_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max1118 *adc = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&adc->lock);
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*val = max1118_read(indio_dev, chan->channel);
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mutex_unlock(&adc->lock);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = max1118_get_vref_mV(indio_dev);
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if (*val < 0)
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return *val;
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*val2 = 8;
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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static const struct iio_info max1118_info = {
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.read_raw = max1118_read_raw,
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};
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static irqreturn_t max1118_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct max1118 *adc = iio_priv(indio_dev);
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int scan_index;
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int i = 0;
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mutex_lock(&adc->lock);
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for_each_set_bit(scan_index, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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const struct iio_chan_spec *scan_chan =
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&indio_dev->channels[scan_index];
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int ret = max1118_read(indio_dev, scan_chan->channel);
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if (ret < 0) {
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dev_warn(&adc->spi->dev,
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"failed to get conversion data\n");
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goto out;
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}
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adc->scan.channels[i] = ret;
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i++;
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}
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iio_push_to_buffers_with_timestamp(indio_dev, &adc->scan,
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iio_get_time_ns(indio_dev));
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out:
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mutex_unlock(&adc->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static void max1118_reg_disable(void *reg)
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{
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regulator_disable(reg);
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}
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static int max1118_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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struct max1118 *adc;
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const struct spi_device_id *id = spi_get_device_id(spi);
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
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if (!indio_dev)
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return -ENOMEM;
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adc = iio_priv(indio_dev);
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adc->spi = spi;
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mutex_init(&adc->lock);
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if (id->driver_data == max1118) {
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adc->reg = devm_regulator_get(&spi->dev, "vref");
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if (IS_ERR(adc->reg))
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return dev_err_probe(&spi->dev, PTR_ERR(adc->reg),
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"failed to get vref regulator\n");
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ret = regulator_enable(adc->reg);
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if (ret)
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return ret;
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ret = devm_add_action_or_reset(&spi->dev, max1118_reg_disable,
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adc->reg);
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if (ret)
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return ret;
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}
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->info = &max1118_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = max1118_channels;
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indio_dev->num_channels = ARRAY_SIZE(max1118_channels);
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/*
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* To reinitiate a conversion on CH0, it is necessary to allow for a
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* conversion to be complete and all of the data to be read out. Once
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* a conversion has been completed, the MAX1117/MAX1118/MAX1119 will go
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* into AutoShutdown mode until the next conversion is initiated.
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*/
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max1118_read(indio_dev, 0);
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ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
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max1118_trigger_handler, NULL);
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if (ret)
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return ret;
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct spi_device_id max1118_id[] = {
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{ "max1117", max1117 },
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{ "max1118", max1118 },
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{ "max1119", max1119 },
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{}
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};
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MODULE_DEVICE_TABLE(spi, max1118_id);
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static const struct of_device_id max1118_dt_ids[] = {
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{ .compatible = "maxim,max1117" },
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{ .compatible = "maxim,max1118" },
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{ .compatible = "maxim,max1119" },
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{},
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};
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MODULE_DEVICE_TABLE(of, max1118_dt_ids);
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static struct spi_driver max1118_spi_driver = {
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.driver = {
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.name = "max1118",
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.of_match_table = max1118_dt_ids,
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},
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.probe = max1118_probe,
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.id_table = max1118_id,
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};
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module_spi_driver(max1118_spi_driver);
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MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
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MODULE_DESCRIPTION("MAXIM MAX1117/MAX1118/MAX1119 ADCs driver");
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MODULE_LICENSE("GPL v2");
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