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c350f8c75b
Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Rich Felker <dalias@libc.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: linux-sh@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
52 lines
1.1 KiB
C
52 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SH_MMU_CONTEXT_32_H
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#define __ASM_SH_MMU_CONTEXT_32_H
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#ifdef CONFIG_CPU_HAS_PTEAEX
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static inline void set_asid(unsigned long asid)
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{
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__raw_writel(asid, MMU_PTEAEX);
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}
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static inline unsigned long get_asid(void)
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{
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return __raw_readl(MMU_PTEAEX) & MMU_CONTEXT_ASID_MASK;
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}
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#else
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static inline void set_asid(unsigned long asid)
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{
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unsigned long __dummy;
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__asm__ __volatile__ ("mov.l %2, %0\n\t"
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"and %3, %0\n\t"
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"or %1, %0\n\t"
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"mov.l %0, %2"
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: "=&r" (__dummy)
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: "r" (asid), "m" (__m(MMU_PTEH)),
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"r" (0xffffff00));
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}
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static inline unsigned long get_asid(void)
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{
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unsigned long asid;
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__asm__ __volatile__ ("mov.l %1, %0"
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: "=r" (asid)
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: "m" (__m(MMU_PTEH)));
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asid &= MMU_CONTEXT_ASID_MASK;
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return asid;
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}
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#endif /* CONFIG_CPU_HAS_PTEAEX */
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/* MMU_TTB is used for optimizing the fault handling. */
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static inline void set_TTB(pgd_t *pgd)
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{
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__raw_writel((unsigned long)pgd, MMU_TTB);
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}
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static inline pgd_t *get_TTB(void)
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{
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return (pgd_t *)__raw_readl(MMU_TTB);
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}
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#endif /* __ASM_SH_MMU_CONTEXT_32_H */
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