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f99c37d562
The code clearing BSS already use macro or use correct instruction depending if the CPU is 32 bits or 64 bits. However, a few instructions remained 32 bits only. By using the accurate MACRO, it is now possible to deal with memory address beyond 32 bits. As a side effect, when using 64bits processor, it also divides the loop number needed to clear the BSS by 2. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
53 lines
1.1 KiB
ArmAsm
53 lines
1.1 KiB
ArmAsm
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 1995 Waldorf Electronics
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* Written by Ralf Baechle and Andreas Busse
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* Copyright (C) 1995 - 1999 Ralf Baechle
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* Copyright (C) 1996 Paul M. Antoine
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* Modified for DECStation and hence R3000 support by Paul M. Antoine
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* Further modifications by David S. Miller and Harald Koerfgen
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* Copyright (C) 1999 Silicon Graphics, Inc.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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LEAF(start)
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/* Save boot rom start args */
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move s0, a0
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move s1, a1
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move s2, a2
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move s3, a3
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/* Clear BSS */
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PTR_LA a0, _edata
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PTR_LA a2, _end
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1: PTR_S zero, 0(a0)
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PTR_ADDIU a0, a0, PTRSIZE
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bne a2, a0, 1b
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PTR_LA a0, (.heap) /* heap address */
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PTR_LA sp, (.stack + 8192) /* stack address */
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PTR_LA t9, decompress_kernel
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jalr t9
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2:
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move a0, s0
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move a1, s1
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move a2, s2
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move a3, s3
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PTR_LI t9, KERNEL_ENTRY
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jalr t9
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3:
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b 3b
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END(start)
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.comm .heap,BOOT_HEAP_SIZE,4
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.comm .stack,4096*2,4
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