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e3adc9495a
Timer will be reset when DSP is powered down. So the time stamp of trace log will be reset after resume. Send time stamp to FW can align the time stamp and avoid reset time stamp in trace log. Signed-off-by: Bard liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
78 lines
2.3 KiB
C
78 lines
2.3 KiB
C
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*/
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#ifndef __INCLUDE_SOUND_SOF_TRACE_H__
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#define __INCLUDE_SOUND_SOF_TRACE_H__
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#include <sound/sof/header.h>
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#include <sound/sof/stream.h>
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/*
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* DMA for Trace
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*/
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#define SOF_TRACE_FILENAME_SIZE 32
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/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS */
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/* Deprecated - use sof_ipc_dma_trace_params_ext */
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struct sof_ipc_dma_trace_params {
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struct sof_ipc_cmd_hdr hdr;
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struct sof_ipc_host_buffer buffer;
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uint32_t stream_tag;
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} __packed;
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/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS_EXT */
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struct sof_ipc_dma_trace_params_ext {
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struct sof_ipc_cmd_hdr hdr;
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struct sof_ipc_host_buffer buffer;
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uint32_t stream_tag;
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uint64_t timestamp_ns; /* in nanosecond */
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uint32_t reserved[8];
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} __packed;
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/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS */
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struct sof_ipc_dma_trace_posn {
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struct sof_ipc_reply rhdr;
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uint32_t host_offset; /* Offset of DMA host buffer */
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uint32_t overflow; /* overflow bytes if any */
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uint32_t messages; /* total trace messages */
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} __packed;
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/*
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* Commom debug
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*/
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/*
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* SOF panic codes
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*/
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#define SOF_IPC_PANIC_MAGIC 0x0dead000
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#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000
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#define SOF_IPC_PANIC_CODE_MASK 0x00000fff
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#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0)
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#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1)
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#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2)
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#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3)
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#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4)
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#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5)
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#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6)
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#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7)
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#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8)
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#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9)
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#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa)
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#define SOF_IPC_PANIC_ASSERT (SOF_IPC_PANIC_MAGIC | 0xb)
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/* panic info include filename and line number */
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struct sof_ipc_panic_info {
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struct sof_ipc_hdr hdr;
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uint32_t code; /* SOF_IPC_PANIC_ */
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char filename[SOF_TRACE_FILENAME_SIZE];
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uint32_t linenum;
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} __packed;
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#endif
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