linux/arch/arm/mach-vexpress/Makefile.boot
Pawel Moll 059289b260 ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)
This patch adds Device Tree file for the CoreTile Express A15x2
(V2P-CA15) with Test Chip 1.

As the chip's GIC has 160 interrupt inputs and equivalent SMM
(FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is
increased.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-02-24 09:18:21 +00:00

10 lines
320 B
Clojure

# Those numbers are used only by the non-DT V2P-CA9 platform
# The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y
zreladdr-y += 0x60008000
params_phys-y := 0x60000100
initrd_phys-y := 0x60800000
dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb