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e2771545f4
The codec clock on sun4i, sun5i and sun7i is a simple gate with PLL2 as parent. Add a driver for such a clock. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
20 lines
429 B
Makefile
20 lines
429 B
Makefile
#
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# Makefile for sunxi specific clk
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#
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obj-y += clk-sunxi.o clk-factors.o
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obj-y += clk-a10-codec.o
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obj-y += clk-a10-hosc.o
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obj-y += clk-a10-pll2.o
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obj-y += clk-a20-gmac.o
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obj-y += clk-mod0.o
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obj-y += clk-simple-gates.o
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obj-y += clk-sun8i-mbus.o
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obj-y += clk-sun9i-core.o
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obj-y += clk-sun9i-mmc.o
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obj-y += clk-usb.o
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obj-$(CONFIG_MFD_SUN6I_PRCM) += \
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clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
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clk-sun8i-apb0.o
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