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fa44d3b9e7
PTR_ERR should access the value just tested by IS_ERR Generated by: scripts/coccinelle/tests/odd_ptr_err.cocci CC: Tiffany Lin <tiffany.lin@mediatek.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
395 lines
10 KiB
C
395 lines
10 KiB
C
/*
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* Copyright (c) 2016 MediaTek Inc.
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* Author: PC Chen <pc.chen@mediatek.com>
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* Tiffany Lin <tiffany.lin@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/videobuf2-dma-contig.h>
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#include "mtk_vcodec_drv.h"
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#include "mtk_vcodec_dec.h"
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#include "mtk_vcodec_dec_pm.h"
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#include "mtk_vcodec_intr.h"
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#include "mtk_vcodec_util.h"
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#include "mtk_vpu.h"
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#define VDEC_HW_ACTIVE 0x10
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#define VDEC_IRQ_CFG 0x11
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#define VDEC_IRQ_CLR 0x10
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#define VDEC_IRQ_CFG_REG 0xa4
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module_param(mtk_v4l2_dbg_level, int, 0644);
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module_param(mtk_vcodec_dbg, bool, 0644);
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/* Wake up context wait_queue */
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static void wake_up_ctx(struct mtk_vcodec_ctx *ctx)
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{
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ctx->int_cond = 1;
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wake_up_interruptible(&ctx->queue);
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}
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static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv)
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{
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struct mtk_vcodec_dev *dev = priv;
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struct mtk_vcodec_ctx *ctx;
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u32 cg_status = 0;
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unsigned int dec_done_status = 0;
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void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] +
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VDEC_IRQ_CFG_REG;
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ctx = mtk_vcodec_get_curr_ctx(dev);
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/* check if HW active or not */
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cg_status = readl(dev->reg_base[0]);
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if ((cg_status & VDEC_HW_ACTIVE) != 0) {
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mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)",
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cg_status);
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return IRQ_HANDLED;
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}
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dec_done_status = readl(vdec_misc_addr);
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ctx->irq_status = dec_done_status;
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if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) !=
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MTK_VDEC_IRQ_STATUS_DEC_SUCCESS)
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return IRQ_HANDLED;
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/* clear interrupt */
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writel((readl(vdec_misc_addr) | VDEC_IRQ_CFG),
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dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
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writel((readl(vdec_misc_addr) & ~VDEC_IRQ_CLR),
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dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
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wake_up_ctx(ctx);
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mtk_v4l2_debug(3,
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"mtk_vcodec_dec_irq_handler :wake up ctx %d, dec_done_status=%x",
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ctx->id, dec_done_status);
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return IRQ_HANDLED;
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}
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static void mtk_vcodec_dec_reset_handler(void *priv)
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{
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struct mtk_vcodec_dev *dev = priv;
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struct mtk_vcodec_ctx *ctx;
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mtk_v4l2_err("Watchdog timeout!!");
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mutex_lock(&dev->dev_mutex);
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list_for_each_entry(ctx, &dev->ctx_list, list) {
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ctx->state = MTK_STATE_ABORT;
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mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ERROR",
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ctx->id);
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}
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mutex_unlock(&dev->dev_mutex);
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}
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static int fops_vcodec_open(struct file *file)
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{
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struct mtk_vcodec_dev *dev = video_drvdata(file);
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struct mtk_vcodec_ctx *ctx = NULL;
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int ret = 0;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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mutex_lock(&dev->dev_mutex);
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ctx->id = dev->id_counter++;
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v4l2_fh_init(&ctx->fh, video_devdata(file));
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file->private_data = &ctx->fh;
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v4l2_fh_add(&ctx->fh);
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INIT_LIST_HEAD(&ctx->list);
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ctx->dev = dev;
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init_waitqueue_head(&ctx->queue);
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mutex_init(&ctx->lock);
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ctx->type = MTK_INST_DECODER;
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ret = mtk_vcodec_dec_ctrls_setup(ctx);
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if (ret) {
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mtk_v4l2_err("Failed to setup mt vcodec controls");
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goto err_ctrls_setup;
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}
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ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev_dec, ctx,
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&mtk_vcodec_dec_queue_init);
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if (IS_ERR((__force void *)ctx->m2m_ctx)) {
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ret = PTR_ERR((__force void *)ctx->m2m_ctx);
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mtk_v4l2_err("Failed to v4l2_m2m_ctx_init() (%d)",
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ret);
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goto err_m2m_ctx_init;
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}
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mtk_vcodec_dec_set_default_params(ctx);
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if (v4l2_fh_is_singular(&ctx->fh)) {
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mtk_vcodec_dec_pw_on(&dev->pm);
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/*
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* vpu_load_firmware checks if it was loaded already and
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* does nothing in that case
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*/
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ret = vpu_load_firmware(dev->vpu_plat_dev);
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if (ret < 0) {
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/*
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* Return 0 if downloading firmware successfully,
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* otherwise it is failed
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*/
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mtk_v4l2_err("vpu_load_firmware failed!");
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goto err_load_fw;
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}
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dev->dec_capability =
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vpu_get_vdec_hw_capa(dev->vpu_plat_dev);
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mtk_v4l2_debug(0, "decoder capability %x", dev->dec_capability);
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}
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list_add(&ctx->list, &dev->ctx_list);
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mutex_unlock(&dev->dev_mutex);
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mtk_v4l2_debug(0, "%s decoder [%d]", dev_name(&dev->plat_dev->dev),
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ctx->id);
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return ret;
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/* Deinit when failure occurred */
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err_load_fw:
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v4l2_m2m_ctx_release(ctx->m2m_ctx);
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err_m2m_ctx_init:
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v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
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err_ctrls_setup:
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v4l2_fh_del(&ctx->fh);
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v4l2_fh_exit(&ctx->fh);
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kfree(ctx);
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mutex_unlock(&dev->dev_mutex);
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return ret;
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}
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static int fops_vcodec_release(struct file *file)
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{
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struct mtk_vcodec_dev *dev = video_drvdata(file);
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struct mtk_vcodec_ctx *ctx = fh_to_ctx(file->private_data);
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mtk_v4l2_debug(0, "[%d] decoder", ctx->id);
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mutex_lock(&dev->dev_mutex);
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/*
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* Call v4l2_m2m_ctx_release before mtk_vcodec_dec_release. First, it
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* makes sure the worker thread is not running after vdec_if_deinit.
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* Second, the decoder will be flushed and all the buffers will be
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* returned in stop_streaming.
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*/
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v4l2_m2m_ctx_release(ctx->m2m_ctx);
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mtk_vcodec_dec_release(ctx);
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if (v4l2_fh_is_singular(&ctx->fh))
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mtk_vcodec_dec_pw_off(&dev->pm);
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v4l2_fh_del(&ctx->fh);
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v4l2_fh_exit(&ctx->fh);
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v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
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list_del_init(&ctx->list);
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kfree(ctx);
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mutex_unlock(&dev->dev_mutex);
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return 0;
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}
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static const struct v4l2_file_operations mtk_vcodec_fops = {
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.owner = THIS_MODULE,
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.open = fops_vcodec_open,
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.release = fops_vcodec_release,
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.poll = v4l2_m2m_fop_poll,
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.unlocked_ioctl = video_ioctl2,
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.mmap = v4l2_m2m_fop_mmap,
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};
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static int mtk_vcodec_probe(struct platform_device *pdev)
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{
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struct mtk_vcodec_dev *dev;
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struct video_device *vfd_dec;
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struct resource *res;
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int i, ret;
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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INIT_LIST_HEAD(&dev->ctx_list);
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dev->plat_dev = pdev;
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dev->vpu_plat_dev = vpu_get_plat_device(dev->plat_dev);
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if (dev->vpu_plat_dev == NULL) {
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mtk_v4l2_err("[VPU] vpu device in not ready");
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return -EPROBE_DEFER;
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}
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vpu_wdt_reg_handler(dev->vpu_plat_dev, mtk_vcodec_dec_reset_handler,
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dev, VPU_RST_DEC);
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ret = mtk_vcodec_init_dec_pm(dev);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to get mt vcodec clock source");
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return ret;
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}
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for (i = 0; i < NUM_MAX_VDEC_REG_BASE; i++) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, i);
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if (res == NULL) {
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dev_err(&pdev->dev, "get memory resource failed.");
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ret = -ENXIO;
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goto err_res;
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}
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dev->reg_base[i] = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR((__force void *)dev->reg_base[i])) {
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ret = PTR_ERR((__force void *)dev->reg_base[i]);
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goto err_res;
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}
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mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]);
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}
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "failed to get irq resource");
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ret = -ENOENT;
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goto err_res;
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}
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dev->dec_irq = platform_get_irq(pdev, 0);
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ret = devm_request_irq(&pdev->dev, dev->dec_irq,
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mtk_vcodec_dec_irq_handler, 0, pdev->name, dev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to install dev->dec_irq %d (%d)",
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dev->dec_irq,
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ret);
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goto err_res;
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}
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disable_irq(dev->dec_irq);
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mutex_init(&dev->dec_mutex);
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mutex_init(&dev->dev_mutex);
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spin_lock_init(&dev->irqlock);
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snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s",
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"[/MTK_V4L2_VDEC]");
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ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
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if (ret) {
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mtk_v4l2_err("v4l2_device_register err=%d", ret);
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goto err_res;
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}
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init_waitqueue_head(&dev->queue);
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vfd_dec = video_device_alloc();
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if (!vfd_dec) {
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mtk_v4l2_err("Failed to allocate video device");
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ret = -ENOMEM;
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goto err_dec_alloc;
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}
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vfd_dec->fops = &mtk_vcodec_fops;
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vfd_dec->ioctl_ops = &mtk_vdec_ioctl_ops;
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vfd_dec->release = video_device_release;
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vfd_dec->lock = &dev->dev_mutex;
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vfd_dec->v4l2_dev = &dev->v4l2_dev;
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vfd_dec->vfl_dir = VFL_DIR_M2M;
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vfd_dec->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE |
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V4L2_CAP_STREAMING;
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snprintf(vfd_dec->name, sizeof(vfd_dec->name), "%s",
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MTK_VCODEC_DEC_NAME);
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video_set_drvdata(vfd_dec, dev);
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dev->vfd_dec = vfd_dec;
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platform_set_drvdata(pdev, dev);
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dev->m2m_dev_dec = v4l2_m2m_init(&mtk_vdec_m2m_ops);
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if (IS_ERR((__force void *)dev->m2m_dev_dec)) {
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mtk_v4l2_err("Failed to init mem2mem dec device");
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ret = PTR_ERR((__force void *)dev->m2m_dev_dec);
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goto err_dec_mem_init;
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}
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dev->decode_workqueue =
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alloc_ordered_workqueue(MTK_VCODEC_DEC_NAME,
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WQ_MEM_RECLAIM | WQ_FREEZABLE);
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if (!dev->decode_workqueue) {
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mtk_v4l2_err("Failed to create decode workqueue");
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ret = -EINVAL;
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goto err_event_workq;
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}
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ret = video_register_device(vfd_dec, VFL_TYPE_GRABBER, 0);
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if (ret) {
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mtk_v4l2_err("Failed to register video device");
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goto err_dec_reg;
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}
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mtk_v4l2_debug(0, "decoder registered as /dev/video%d",
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vfd_dec->num);
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return 0;
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err_dec_reg:
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destroy_workqueue(dev->decode_workqueue);
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err_event_workq:
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v4l2_m2m_release(dev->m2m_dev_dec);
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err_dec_mem_init:
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video_unregister_device(vfd_dec);
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err_dec_alloc:
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v4l2_device_unregister(&dev->v4l2_dev);
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err_res:
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mtk_vcodec_release_dec_pm(dev);
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return ret;
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}
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static const struct of_device_id mtk_vcodec_match[] = {
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{.compatible = "mediatek,mt8173-vcodec-dec",},
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_vcodec_match);
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static int mtk_vcodec_dec_remove(struct platform_device *pdev)
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{
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struct mtk_vcodec_dev *dev = platform_get_drvdata(pdev);
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flush_workqueue(dev->decode_workqueue);
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destroy_workqueue(dev->decode_workqueue);
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if (dev->m2m_dev_dec)
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v4l2_m2m_release(dev->m2m_dev_dec);
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if (dev->vfd_dec)
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video_unregister_device(dev->vfd_dec);
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v4l2_device_unregister(&dev->v4l2_dev);
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mtk_vcodec_release_dec_pm(dev);
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return 0;
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}
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static struct platform_driver mtk_vcodec_dec_driver = {
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.probe = mtk_vcodec_probe,
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.remove = mtk_vcodec_dec_remove,
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.driver = {
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.name = MTK_VCODEC_DEC_NAME,
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.of_match_table = mtk_vcodec_match,
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},
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};
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module_platform_driver(mtk_vcodec_dec_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Mediatek video codec V4L2 decoder driver");
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