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Trying to build a PMC-Sierra MSP4200 VoIP gateway defconfig will not work since MIPS34K_MISSED_ITLB_WAR is not defined for all boards supported within pmc-serria/msp71xx. This patch defines MIPS34K_MISSED_ITLB_WAR to prevent such build failures: CHK include/linux/version.h CHK include/linux/utsrelease.h SYMLINK include/asm -> include/asm-mips CC arch/mips/kernel/asm-offsets.s In file included fromlinux-msp71xx/linux-2.6.29/arch/mips/include/asm/bitops.h:24, from include/linux/bitops.h:17, from include/linux/kernel.h:15, from include/linux/sched.h:52, from arch/mips/kernel/asm-offsets.c:13: linux-msp71xx/linux-2.6.29/arch/mips/include/asm/war.h:241:2: error: #error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform This fixes a compile error when building for the MSP4200 boards. Identical patches to fix this were send by Florian Fainelli <florian@openwrt.org> Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
31 lines
978 B
C
31 lines
978 B
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
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*/
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#ifndef __ASM_MIPS_PMC_SIERRA_WAR_H
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#define __ASM_MIPS_PMC_SIERRA_WAR_H
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#define R4600_V1_INDEX_ICACHEOP_WAR 0
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#define R4600_V1_HIT_CACHEOP_WAR 0
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#define R4600_V2_HIT_CACHEOP_WAR 0
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#define R5432_CP0_INTERRUPT_WAR 0
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#define BCM1250_M3_WAR 0
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#define SIBYTE_1956_WAR 0
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#define MIPS4K_ICACHE_REFILL_WAR 0
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#define MIPS_CACHE_SYNC_WAR 0
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#define TX49XX_ICACHE_INDEX_INV_WAR 0
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#define RM9000_CDEX_SMP_WAR 0
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#define ICACHE_REFILLS_WORKAROUND_WAR 0
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#define R10000_LLSC_WAR 0
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#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \
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defined(CONFIG_PMC_MSP7120_FPGA)
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#define MIPS34K_MISSED_ITLB_WAR 1
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#else
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#define MIPS34K_MISSED_ITLB_WAR 0
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#endif
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#endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */
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