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2f4dfe206a
With the advent of kdump, the assumption that the boot CPU when booting an UP
kernel is always the CPU with a particular hardware ID (often 0) (usually
referred to as BSP on some architectures) is not valid anymore. The reason
being that the dump capture kernel boots on the crashed CPU (the CPU that
invoked crash_kexec), which may be or may not be that particular CPU.
Move definition of hard_smp_processor_id for the UP case to
architecture-specific code ("asm/smp.h") where it belongs, so that each
architecture can provide its own implementation.
Signed-off-by: Fernando Luis Vazquez Cao <fernando@oss.ntt.co.jp>
Cc: "Luck, Tony" <tony.luck@intel.com>
Acked-by: Andi Kleen <ak@suse.de>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
120 lines
2.9 KiB
C
120 lines
2.9 KiB
C
/*
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* include/asm-s390/smp.h
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*
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* S390 version
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* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
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* Martin Schwidefsky (schwidefsky@de.ibm.com)
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* Heiko Carstens (heiko.carstens@de.ibm.com)
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*/
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/bitops.h>
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#if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
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#include <asm/lowcore.h>
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#include <asm/sigp.h>
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#include <asm/ptrace.h>
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/*
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s390 specific smp.c headers
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*/
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typedef struct
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{
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int intresting;
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sigp_ccode ccode;
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__u32 status;
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__u16 cpu;
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} sigp_info;
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extern void machine_restart_smp(char *);
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extern void machine_halt_smp(void);
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extern void machine_power_off_smp(void);
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extern void smp_setup_cpu_possible_map(void);
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extern int smp_call_function_on(void (*func) (void *info), void *info,
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int nonatomic, int wait, int cpu);
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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/*
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* This magic constant controls our willingness to transfer
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* a process across CPUs. Such a transfer incurs misses on the L1
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* cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
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* gut feeling is this will vary by board in value. For a board
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* with separate L2 cache it probably depends also on the RSS, and
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* for a board with shared L2 cache it ought to decay fast as other
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* processes are run.
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*/
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#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
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#define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
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static inline __u16 hard_smp_processor_id(void)
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{
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__u16 cpu_address;
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asm volatile("stap %0" : "=m" (cpu_address));
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return cpu_address;
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}
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/*
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* returns 1 if cpu is in stopped/check stopped state or not operational
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* returns 0 otherwise
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*/
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static inline int
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smp_cpu_not_running(int cpu)
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{
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__u32 status;
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switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
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case sigp_order_code_accepted:
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case sigp_status_stored:
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/* Check for stopped and check stop state */
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if (status & 0x50)
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return 1;
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break;
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case sigp_not_operational:
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return 1;
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default:
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break;
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}
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return 0;
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}
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#define cpu_logical_map(cpu) (cpu)
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extern int __cpu_disable (void);
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extern void __cpu_die (unsigned int cpu);
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extern void cpu_die (void) __attribute__ ((noreturn));
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extern int __cpu_up (unsigned int cpu);
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#endif
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#ifndef CONFIG_SMP
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static inline int
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smp_call_function_on(void (*func) (void *info), void *info,
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int nonatomic, int wait, int cpu)
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{
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func(info);
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return 0;
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}
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static inline void smp_send_stop(void)
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{
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/* Disable all interrupts/machine checks */
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__load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
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}
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#define hard_smp_processor_id() 0
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#define smp_cpu_not_running(cpu) 1
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#define smp_setup_cpu_possible_map() do { } while (0)
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#endif
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extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
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#endif
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