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cb84c2b401
hexagon:defconfig fails to build in linux-next since commit 332fd7c4fe
("genirq: Generic chip: Change irq_reg_{readl,writel} arguments").
The primary build failure is
arch/hexagon/include/asm/cacheflush.h: In function 'copy_to_user_page':
arch/hexagon/include/asm/cacheflush.h:89:22: error: 'VM_EXEC' undeclared
This is the result of including of <linux/io.h> from <linux/irq.h>,
which is now necessary due to the use of readl and writel from irq.h.
This causes recursive inclusions in hexagon code; cacheflush.h is included
from mm.h prior to the definition of VM_EXEC.
Fix the problem by moving copy_to_user_page from the hexagon include file to
arch/hexagon/mm/cache.c, similar to other architectures. After this change,
several redefinitions of readl and writel are reported. Those are caused
by recursive inclusions of io.h and asm/cacheflush.h. Fix those problems by
reducing the number of files included from those files. Also, it was necessary
to stop including asm-generic/cacheflush.h from asm/cacheflush.h. Instead,
functionality originally provided by asm-generic/cacheflush.h is now coded
in asm/cacheflush.h directly.
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
signed-off-by: Richard Kuo <rkuo@codeaurora.org>
151 lines
3.7 KiB
C
151 lines
3.7 KiB
C
/*
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* Arch related setup for Hexagon
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*
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* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/bootmem.h>
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#include <linux/mmzone.h>
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#include <linux/mm.h>
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#include <linux/seq_file.h>
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#include <linux/console.h>
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#include <linux/of_fdt.h>
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#include <asm/io.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/processor.h>
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#include <asm/hexagon_vm.h>
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#include <asm/vm_mmu.h>
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#include <asm/time.h>
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char cmd_line[COMMAND_LINE_SIZE];
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static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
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int on_simulator;
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void calibrate_delay(void)
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{
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loops_per_jiffy = thread_freq_mhz * 1000000 / HZ;
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}
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/*
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* setup_arch - high level architectural setup routine
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* @cmdline_p: pointer to pointer to command-line arguments
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*/
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void __init setup_arch(char **cmdline_p)
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{
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char *p = &external_cmdline_buffer;
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/*
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* These will eventually be pulled in via either some hypervisor
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* or devicetree description. Hardwiring for now.
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*/
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pcycle_freq_mhz = 600;
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thread_freq_mhz = 100;
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sleep_clk_freq = 32000;
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/*
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* Set up event bindings to handle exceptions and interrupts.
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*/
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__vmsetvec(_K_VM_event_vector);
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printk(KERN_INFO "PHYS_OFFSET=0x%08x\n", PHYS_OFFSET);
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/*
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* Simulator has a few differences from the hardware.
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* For now, check uninitialized-but-mapped memory
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* prior to invoking setup_arch_memory().
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*/
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if (*(int *)((unsigned long)_end + 8) == 0x1f1f1f1f)
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on_simulator = 1;
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else
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on_simulator = 0;
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if (p[0] != '\0')
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strlcpy(boot_command_line, p, COMMAND_LINE_SIZE);
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else
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strlcpy(boot_command_line, default_command_line,
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COMMAND_LINE_SIZE);
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/*
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* boot_command_line and the value set up by setup_arch
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* are both picked up by the init code. If no reason to
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* make them different, pass the same pointer back.
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*/
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strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
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*cmdline_p = cmd_line;
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parse_early_param();
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setup_arch_memory();
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#ifdef CONFIG_SMP
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smp_start_cpus();
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#endif
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}
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/*
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* Functions for dumping CPU info via /proc
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* Probably should move to kernel/proc.c or something.
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*/
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < nr_cpu_ids ? (void *)((unsigned long) *pos + 1) : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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/*
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* Eventually this will dump information about
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* CPU properties like ISA level, TLB size, etc.
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*/
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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int cpu = (unsigned long) v - 1;
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#ifdef CONFIG_SMP
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if (!cpu_online(cpu))
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return 0;
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#endif
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seq_printf(m, "processor\t: %d\n", cpu);
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seq_printf(m, "model name\t: Hexagon Virtual Machine\n");
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seq_printf(m, "BogoMips\t: %lu.%02lu\n",
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(loops_per_jiffy * HZ) / 500000,
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((loops_per_jiffy * HZ) / 5000) % 100);
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seq_printf(m, "\n");
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return 0;
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}
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const struct seq_operations cpuinfo_op = {
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.start = &c_start,
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.next = &c_next,
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.stop = &c_stop,
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.show = &show_cpuinfo,
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};
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