linux/Documentation/devicetree/bindings/net/adi,adin.yaml
Alexandru Ardelean 432264e9df dt-bindings: net: remove un-implemented property
The `adi,disable-energy-detect` property was implemented in an initial
version of the `adin` driver series, but after a review it was discarded in
favor of implementing the ETHTOOL_PHY_EDPD phy-tunable option.

With the ETHTOOL_PHY_EDPD control, it's possible to disable/enable
Energy-Detect-Power-Down for the `adin` PHY, so this device-tree is not
needed.

Fixes: 767078132f ("dt-bindings: net: add bindings for ADIN PHY driver")
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-09-20 18:57:07 -07:00

67 lines
1.5 KiB
YAML

# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/adi,adin.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices ADIN1200/ADIN1300 PHY
maintainers:
- Alexandru Ardelean <alexandru.ardelean@analog.com>
description: |
Bindings for Analog Devices Industrial Ethernet PHYs
allOf:
- $ref: ethernet-phy.yaml#
properties:
adi,rx-internal-delay-ps:
description: |
RGMII RX Clock Delay used only when PHY operates in RGMII mode with
internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
enum: [ 1600, 1800, 2000, 2200, 2400 ]
default: 2000
adi,tx-internal-delay-ps:
description: |
RGMII TX Clock Delay used only when PHY operates in RGMII mode with
internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
enum: [ 1600, 1800, 2000, 2200, 2400 ]
default: 2000
adi,fifo-depth-bits:
description: |
When operating in RMII mode, this option configures the FIFO depth.
enum: [ 4, 8, 12, 16, 20, 24 ]
default: 8
examples:
- |
ethernet {
#address-cells = <1>;
#size-cells = <0>;
phy-mode = "rgmii-id";
ethernet-phy@0 {
reg = <0>;
adi,rx-internal-delay-ps = <1800>;
adi,tx-internal-delay-ps = <2200>;
};
};
- |
ethernet {
#address-cells = <1>;
#size-cells = <0>;
phy-mode = "rmii";
ethernet-phy@1 {
reg = <1>;
adi,fifo-depth-bits = <16>;
};
};