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3f8976d90b
Apart from the iomux setup which may not be needed on custom boards the kernel starts fine using the devicetree, so add generic boards to the dt_compat entries. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
144 lines
3.4 KiB
C
144 lines
3.4 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/micrel_phy.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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void imx6q_restart(char mode, const char *cmd)
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{
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struct device_node *np;
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void __iomem *wdog_base;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
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wdog_base = of_iomap(np, 0);
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if (!wdog_base)
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goto soft;
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imx_src_prepare_restart();
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/* enable wdog */
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writew_relaxed(1 << 2, wdog_base);
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/* write twice to ensure the request will not get ignored */
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writew_relaxed(1 << 2, wdog_base);
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/* wait for reset to assert ... */
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mdelay(500);
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pr_err("Watchdog reset failed to assert reset\n");
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/* delay to allow the serial port to show the message */
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mdelay(50);
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soft:
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/* we'll take a jump through zero as a poor second */
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soft_restart(0);
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}
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/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
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static int ksz9021rn_phy_fixup(struct phy_device *phydev)
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{
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/* min rx data delay */
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phy_write(phydev, 0x0b, 0x8105);
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phy_write(phydev, 0x0c, 0x0000);
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/* max rx/tx clock delay, min rx/tx control delay */
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phy_write(phydev, 0x0b, 0x8104);
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phy_write(phydev, 0x0c, 0xf0f0);
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phy_write(phydev, 0x0b, 0x104);
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return 0;
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}
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static void __init imx6q_init_machine(void)
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{
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if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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imx6q_pm_init();
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}
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static void __init imx6q_map_io(void)
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{
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imx_lluart_map_io();
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imx_scu_map_io();
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imx6q_clock_map_io();
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}
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static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
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struct device_node *interrupt_parent)
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{
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static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
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gpio_irq_base -= 32;
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irq_domain_add_simple(np, gpio_irq_base);
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return 0;
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}
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static const struct of_device_id imx6q_irq_match[] __initconst = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{ .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
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{ /* sentinel */ }
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};
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static void __init imx6q_init_irq(void)
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{
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l2x0_of_init(0, ~0UL);
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imx_src_init();
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imx_gpc_init();
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of_irq_init(imx6q_irq_match);
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}
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static void __init imx6q_timer_init(void)
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{
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mx6q_clocks_init();
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}
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static struct sys_timer imx6q_timer = {
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.init = imx6q_timer_init,
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};
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static const char *imx6q_dt_compat[] __initdata = {
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"fsl,imx6q-arm2",
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"fsl,imx6q-sabrelite",
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"fsl,imx6q",
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NULL,
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};
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DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
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.map_io = imx6q_map_io,
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.init_irq = imx6q_init_irq,
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.handle_irq = imx6q_handle_irq,
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.timer = &imx6q_timer,
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.init_machine = imx6q_init_machine,
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.dt_compat = imx6q_dt_compat,
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.restart = imx6q_restart,
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MACHINE_END
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