mirror of
https://github.com/torvalds/linux.git
synced 2024-12-29 14:21:47 +00:00
88f50c8074
For 6xx+. Required for mesa to use htile support for HiZ/HiS.
Userspace will check radeon version 2.14 with is bumped either
by tiling patch or stream out patch. This patch only add support
for htile relocation which should be enough for any userspace
to implement the hyperz (using htile buffer) feature.
v2: Jerome: Fix size checking for htile buffer.
v3: Jerome: Adapt on top of r600/evergreen cs checker changes,
also check htile surface in case only stencil is
present.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
645 lines
21 KiB
Plaintext
645 lines
21 KiB
Plaintext
evergreen 0x9400
|
|
0x0000802C GRBM_GFX_INDEX
|
|
0x00008040 WAIT_UNTIL
|
|
0x00008044 WAIT_UNTIL_POLL_CNTL
|
|
0x00008048 WAIT_UNTIL_POLL_MASK
|
|
0x0000804c WAIT_UNTIL_POLL_REFDATA
|
|
0x000084FC CP_STRMOUT_CNTL
|
|
0x000085F0 CP_COHER_CNTL
|
|
0x000085F4 CP_COHER_SIZE
|
|
0x000088B0 VGT_VTX_VECT_EJECT_REG
|
|
0x000088C4 VGT_CACHE_INVALIDATION
|
|
0x000088D4 VGT_GS_VERTEX_REUSE
|
|
0x00008958 VGT_PRIMITIVE_TYPE
|
|
0x0000895C VGT_INDEX_TYPE
|
|
0x00008970 VGT_NUM_INDICES
|
|
0x00008974 VGT_NUM_INSTANCES
|
|
0x00008990 VGT_COMPUTE_DIM_X
|
|
0x00008994 VGT_COMPUTE_DIM_Y
|
|
0x00008998 VGT_COMPUTE_DIM_Z
|
|
0x0000899C VGT_COMPUTE_START_X
|
|
0x000089A0 VGT_COMPUTE_START_Y
|
|
0x000089A4 VGT_COMPUTE_START_Z
|
|
0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE
|
|
0x00008A14 PA_CL_ENHANCE
|
|
0x00008A60 PA_SC_LINE_STIPPLE_VALUE
|
|
0x00008B10 PA_SC_LINE_STIPPLE_STATE
|
|
0x00008BF0 PA_SC_ENHANCE
|
|
0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
|
|
0x00008D90 SQ_DYN_GPR_OPTIMIZATION
|
|
0x00008D94 SQ_DYN_GPR_SIMD_LOCK_EN
|
|
0x00008D98 SQ_DYN_GPR_THREAD_LIMIT
|
|
0x00008D9C SQ_DYN_GPR_LDS_LIMIT
|
|
0x00008C00 SQ_CONFIG
|
|
0x00008C04 SQ_GPR_RESOURCE_MGMT_1
|
|
0x00008C08 SQ_GPR_RESOURCE_MGMT_2
|
|
0x00008C0C SQ_GPR_RESOURCE_MGMT_3
|
|
0x00008C10 SQ_GLOBAL_GPR_RESOURCE_MGMT_1
|
|
0x00008C14 SQ_GLOBAL_GPR_RESOURCE_MGMT_2
|
|
0x00008C18 SQ_THREAD_RESOURCE_MGMT
|
|
0x00008C1C SQ_THREAD_RESOURCE_MGMT_2
|
|
0x00008C20 SQ_STACK_RESOURCE_MGMT_1
|
|
0x00008C24 SQ_STACK_RESOURCE_MGMT_2
|
|
0x00008C28 SQ_STACK_RESOURCE_MGMT_3
|
|
0x00008DF8 SQ_CONST_MEM_BASE
|
|
0x00008E20 SQ_STATIC_THREAD_MGMT_1
|
|
0x00008E24 SQ_STATIC_THREAD_MGMT_2
|
|
0x00008E28 SQ_STATIC_THREAD_MGMT_3
|
|
0x00008E2C SQ_LDS_RESOURCE_MGMT
|
|
0x00008E48 SQ_EX_ALLOC_TABLE_SLOTS
|
|
0x00009014 SX_MEMORY_EXPORT_SIZE
|
|
0x00009100 SPI_CONFIG_CNTL
|
|
0x0000913C SPI_CONFIG_CNTL_1
|
|
0x00009508 TA_CNTL_AUX
|
|
0x00009700 VC_CNTL
|
|
0x00009714 VC_ENHANCE
|
|
0x00009830 DB_DEBUG
|
|
0x00009834 DB_DEBUG2
|
|
0x00009838 DB_DEBUG3
|
|
0x0000983C DB_DEBUG4
|
|
0x00009854 DB_WATERMARKS
|
|
0x0000A400 TD_PS_BORDER_COLOR_INDEX
|
|
0x0000A404 TD_PS_BORDER_COLOR_RED
|
|
0x0000A408 TD_PS_BORDER_COLOR_GREEN
|
|
0x0000A40C TD_PS_BORDER_COLOR_BLUE
|
|
0x0000A410 TD_PS_BORDER_COLOR_ALPHA
|
|
0x0000A414 TD_VS_BORDER_COLOR_INDEX
|
|
0x0000A418 TD_VS_BORDER_COLOR_RED
|
|
0x0000A41C TD_VS_BORDER_COLOR_GREEN
|
|
0x0000A420 TD_VS_BORDER_COLOR_BLUE
|
|
0x0000A424 TD_VS_BORDER_COLOR_ALPHA
|
|
0x0000A428 TD_GS_BORDER_COLOR_INDEX
|
|
0x0000A42C TD_GS_BORDER_COLOR_RED
|
|
0x0000A430 TD_GS_BORDER_COLOR_GREEN
|
|
0x0000A434 TD_GS_BORDER_COLOR_BLUE
|
|
0x0000A438 TD_GS_BORDER_COLOR_ALPHA
|
|
0x0000A43C TD_HS_BORDER_COLOR_INDEX
|
|
0x0000A440 TD_HS_BORDER_COLOR_RED
|
|
0x0000A444 TD_HS_BORDER_COLOR_GREEN
|
|
0x0000A448 TD_HS_BORDER_COLOR_BLUE
|
|
0x0000A44C TD_HS_BORDER_COLOR_ALPHA
|
|
0x0000A450 TD_LS_BORDER_COLOR_INDEX
|
|
0x0000A454 TD_LS_BORDER_COLOR_RED
|
|
0x0000A458 TD_LS_BORDER_COLOR_GREEN
|
|
0x0000A45C TD_LS_BORDER_COLOR_BLUE
|
|
0x0000A460 TD_LS_BORDER_COLOR_ALPHA
|
|
0x0000A464 TD_CS_BORDER_COLOR_INDEX
|
|
0x0000A468 TD_CS_BORDER_COLOR_RED
|
|
0x0000A46C TD_CS_BORDER_COLOR_GREEN
|
|
0x0000A470 TD_CS_BORDER_COLOR_BLUE
|
|
0x0000A474 TD_CS_BORDER_COLOR_ALPHA
|
|
0x00028000 DB_RENDER_CONTROL
|
|
0x00028004 DB_COUNT_CONTROL
|
|
0x0002800C DB_RENDER_OVERRIDE
|
|
0x00028010 DB_RENDER_OVERRIDE2
|
|
0x00028028 DB_STENCIL_CLEAR
|
|
0x0002802C DB_DEPTH_CLEAR
|
|
0x00028030 PA_SC_SCREEN_SCISSOR_TL
|
|
0x00028034 PA_SC_SCREEN_SCISSOR_BR
|
|
0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0
|
|
0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1
|
|
0x00028148 SQ_ALU_CONST_BUFFER_SIZE_PS_2
|
|
0x0002814C SQ_ALU_CONST_BUFFER_SIZE_PS_3
|
|
0x00028150 SQ_ALU_CONST_BUFFER_SIZE_PS_4
|
|
0x00028154 SQ_ALU_CONST_BUFFER_SIZE_PS_5
|
|
0x00028158 SQ_ALU_CONST_BUFFER_SIZE_PS_6
|
|
0x0002815C SQ_ALU_CONST_BUFFER_SIZE_PS_7
|
|
0x00028160 SQ_ALU_CONST_BUFFER_SIZE_PS_8
|
|
0x00028164 SQ_ALU_CONST_BUFFER_SIZE_PS_9
|
|
0x00028168 SQ_ALU_CONST_BUFFER_SIZE_PS_10
|
|
0x0002816C SQ_ALU_CONST_BUFFER_SIZE_PS_11
|
|
0x00028170 SQ_ALU_CONST_BUFFER_SIZE_PS_12
|
|
0x00028174 SQ_ALU_CONST_BUFFER_SIZE_PS_13
|
|
0x00028178 SQ_ALU_CONST_BUFFER_SIZE_PS_14
|
|
0x0002817C SQ_ALU_CONST_BUFFER_SIZE_PS_15
|
|
0x00028180 SQ_ALU_CONST_BUFFER_SIZE_VS_0
|
|
0x00028184 SQ_ALU_CONST_BUFFER_SIZE_VS_1
|
|
0x00028188 SQ_ALU_CONST_BUFFER_SIZE_VS_2
|
|
0x0002818C SQ_ALU_CONST_BUFFER_SIZE_VS_3
|
|
0x00028190 SQ_ALU_CONST_BUFFER_SIZE_VS_4
|
|
0x00028194 SQ_ALU_CONST_BUFFER_SIZE_VS_5
|
|
0x00028198 SQ_ALU_CONST_BUFFER_SIZE_VS_6
|
|
0x0002819C SQ_ALU_CONST_BUFFER_SIZE_VS_7
|
|
0x000281A0 SQ_ALU_CONST_BUFFER_SIZE_VS_8
|
|
0x000281A4 SQ_ALU_CONST_BUFFER_SIZE_VS_9
|
|
0x000281A8 SQ_ALU_CONST_BUFFER_SIZE_VS_10
|
|
0x000281AC SQ_ALU_CONST_BUFFER_SIZE_VS_11
|
|
0x000281B0 SQ_ALU_CONST_BUFFER_SIZE_VS_12
|
|
0x000281B4 SQ_ALU_CONST_BUFFER_SIZE_VS_13
|
|
0x000281B8 SQ_ALU_CONST_BUFFER_SIZE_VS_14
|
|
0x000281BC SQ_ALU_CONST_BUFFER_SIZE_VS_15
|
|
0x000281C0 SQ_ALU_CONST_BUFFER_SIZE_GS_0
|
|
0x000281C4 SQ_ALU_CONST_BUFFER_SIZE_GS_1
|
|
0x000281C8 SQ_ALU_CONST_BUFFER_SIZE_GS_2
|
|
0x000281CC SQ_ALU_CONST_BUFFER_SIZE_GS_3
|
|
0x000281D0 SQ_ALU_CONST_BUFFER_SIZE_GS_4
|
|
0x000281D4 SQ_ALU_CONST_BUFFER_SIZE_GS_5
|
|
0x000281D8 SQ_ALU_CONST_BUFFER_SIZE_GS_6
|
|
0x000281DC SQ_ALU_CONST_BUFFER_SIZE_GS_7
|
|
0x000281E0 SQ_ALU_CONST_BUFFER_SIZE_GS_8
|
|
0x000281E4 SQ_ALU_CONST_BUFFER_SIZE_GS_9
|
|
0x000281E8 SQ_ALU_CONST_BUFFER_SIZE_GS_10
|
|
0x000281EC SQ_ALU_CONST_BUFFER_SIZE_GS_11
|
|
0x000281F0 SQ_ALU_CONST_BUFFER_SIZE_GS_12
|
|
0x000281F4 SQ_ALU_CONST_BUFFER_SIZE_GS_13
|
|
0x000281F8 SQ_ALU_CONST_BUFFER_SIZE_GS_14
|
|
0x000281FC SQ_ALU_CONST_BUFFER_SIZE_GS_15
|
|
0x00028200 PA_SC_WINDOW_OFFSET
|
|
0x00028204 PA_SC_WINDOW_SCISSOR_TL
|
|
0x00028208 PA_SC_WINDOW_SCISSOR_BR
|
|
0x0002820C PA_SC_CLIPRECT_RULE
|
|
0x00028210 PA_SC_CLIPRECT_0_TL
|
|
0x00028214 PA_SC_CLIPRECT_0_BR
|
|
0x00028218 PA_SC_CLIPRECT_1_TL
|
|
0x0002821C PA_SC_CLIPRECT_1_BR
|
|
0x00028220 PA_SC_CLIPRECT_2_TL
|
|
0x00028224 PA_SC_CLIPRECT_2_BR
|
|
0x00028228 PA_SC_CLIPRECT_3_TL
|
|
0x0002822C PA_SC_CLIPRECT_3_BR
|
|
0x00028230 PA_SC_EDGERULE
|
|
0x00028234 PA_SU_HARDWARE_SCREEN_OFFSET
|
|
0x00028240 PA_SC_GENERIC_SCISSOR_TL
|
|
0x00028244 PA_SC_GENERIC_SCISSOR_BR
|
|
0x00028250 PA_SC_VPORT_SCISSOR_0_TL
|
|
0x00028254 PA_SC_VPORT_SCISSOR_0_BR
|
|
0x00028258 PA_SC_VPORT_SCISSOR_1_TL
|
|
0x0002825C PA_SC_VPORT_SCISSOR_1_BR
|
|
0x00028260 PA_SC_VPORT_SCISSOR_2_TL
|
|
0x00028264 PA_SC_VPORT_SCISSOR_2_BR
|
|
0x00028268 PA_SC_VPORT_SCISSOR_3_TL
|
|
0x0002826C PA_SC_VPORT_SCISSOR_3_BR
|
|
0x00028270 PA_SC_VPORT_SCISSOR_4_TL
|
|
0x00028274 PA_SC_VPORT_SCISSOR_4_BR
|
|
0x00028278 PA_SC_VPORT_SCISSOR_5_TL
|
|
0x0002827C PA_SC_VPORT_SCISSOR_5_BR
|
|
0x00028280 PA_SC_VPORT_SCISSOR_6_TL
|
|
0x00028284 PA_SC_VPORT_SCISSOR_6_BR
|
|
0x00028288 PA_SC_VPORT_SCISSOR_7_TL
|
|
0x0002828C PA_SC_VPORT_SCISSOR_7_BR
|
|
0x00028290 PA_SC_VPORT_SCISSOR_8_TL
|
|
0x00028294 PA_SC_VPORT_SCISSOR_8_BR
|
|
0x00028298 PA_SC_VPORT_SCISSOR_9_TL
|
|
0x0002829C PA_SC_VPORT_SCISSOR_9_BR
|
|
0x000282A0 PA_SC_VPORT_SCISSOR_10_TL
|
|
0x000282A4 PA_SC_VPORT_SCISSOR_10_BR
|
|
0x000282A8 PA_SC_VPORT_SCISSOR_11_TL
|
|
0x000282AC PA_SC_VPORT_SCISSOR_11_BR
|
|
0x000282B0 PA_SC_VPORT_SCISSOR_12_TL
|
|
0x000282B4 PA_SC_VPORT_SCISSOR_12_BR
|
|
0x000282B8 PA_SC_VPORT_SCISSOR_13_TL
|
|
0x000282BC PA_SC_VPORT_SCISSOR_13_BR
|
|
0x000282C0 PA_SC_VPORT_SCISSOR_14_TL
|
|
0x000282C4 PA_SC_VPORT_SCISSOR_14_BR
|
|
0x000282C8 PA_SC_VPORT_SCISSOR_15_TL
|
|
0x000282CC PA_SC_VPORT_SCISSOR_15_BR
|
|
0x000282D0 PA_SC_VPORT_ZMIN_0
|
|
0x000282D4 PA_SC_VPORT_ZMAX_0
|
|
0x000282D8 PA_SC_VPORT_ZMIN_1
|
|
0x000282DC PA_SC_VPORT_ZMAX_1
|
|
0x000282E0 PA_SC_VPORT_ZMIN_2
|
|
0x000282E4 PA_SC_VPORT_ZMAX_2
|
|
0x000282E8 PA_SC_VPORT_ZMIN_3
|
|
0x000282EC PA_SC_VPORT_ZMAX_3
|
|
0x000282F0 PA_SC_VPORT_ZMIN_4
|
|
0x000282F4 PA_SC_VPORT_ZMAX_4
|
|
0x000282F8 PA_SC_VPORT_ZMIN_5
|
|
0x000282FC PA_SC_VPORT_ZMAX_5
|
|
0x00028300 PA_SC_VPORT_ZMIN_6
|
|
0x00028304 PA_SC_VPORT_ZMAX_6
|
|
0x00028308 PA_SC_VPORT_ZMIN_7
|
|
0x0002830C PA_SC_VPORT_ZMAX_7
|
|
0x00028310 PA_SC_VPORT_ZMIN_8
|
|
0x00028314 PA_SC_VPORT_ZMAX_8
|
|
0x00028318 PA_SC_VPORT_ZMIN_9
|
|
0x0002831C PA_SC_VPORT_ZMAX_9
|
|
0x00028320 PA_SC_VPORT_ZMIN_10
|
|
0x00028324 PA_SC_VPORT_ZMAX_10
|
|
0x00028328 PA_SC_VPORT_ZMIN_11
|
|
0x0002832C PA_SC_VPORT_ZMAX_11
|
|
0x00028330 PA_SC_VPORT_ZMIN_12
|
|
0x00028334 PA_SC_VPORT_ZMAX_12
|
|
0x00028338 PA_SC_VPORT_ZMIN_13
|
|
0x0002833C PA_SC_VPORT_ZMAX_13
|
|
0x00028340 PA_SC_VPORT_ZMIN_14
|
|
0x00028344 PA_SC_VPORT_ZMAX_14
|
|
0x00028348 PA_SC_VPORT_ZMIN_15
|
|
0x0002834C PA_SC_VPORT_ZMAX_15
|
|
0x00028354 SX_SURFACE_SYNC
|
|
0x00028380 SQ_VTX_SEMANTIC_0
|
|
0x00028384 SQ_VTX_SEMANTIC_1
|
|
0x00028388 SQ_VTX_SEMANTIC_2
|
|
0x0002838C SQ_VTX_SEMANTIC_3
|
|
0x00028390 SQ_VTX_SEMANTIC_4
|
|
0x00028394 SQ_VTX_SEMANTIC_5
|
|
0x00028398 SQ_VTX_SEMANTIC_6
|
|
0x0002839C SQ_VTX_SEMANTIC_7
|
|
0x000283A0 SQ_VTX_SEMANTIC_8
|
|
0x000283A4 SQ_VTX_SEMANTIC_9
|
|
0x000283A8 SQ_VTX_SEMANTIC_10
|
|
0x000283AC SQ_VTX_SEMANTIC_11
|
|
0x000283B0 SQ_VTX_SEMANTIC_12
|
|
0x000283B4 SQ_VTX_SEMANTIC_13
|
|
0x000283B8 SQ_VTX_SEMANTIC_14
|
|
0x000283BC SQ_VTX_SEMANTIC_15
|
|
0x000283C0 SQ_VTX_SEMANTIC_16
|
|
0x000283C4 SQ_VTX_SEMANTIC_17
|
|
0x000283C8 SQ_VTX_SEMANTIC_18
|
|
0x000283CC SQ_VTX_SEMANTIC_19
|
|
0x000283D0 SQ_VTX_SEMANTIC_20
|
|
0x000283D4 SQ_VTX_SEMANTIC_21
|
|
0x000283D8 SQ_VTX_SEMANTIC_22
|
|
0x000283DC SQ_VTX_SEMANTIC_23
|
|
0x000283E0 SQ_VTX_SEMANTIC_24
|
|
0x000283E4 SQ_VTX_SEMANTIC_25
|
|
0x000283E8 SQ_VTX_SEMANTIC_26
|
|
0x000283EC SQ_VTX_SEMANTIC_27
|
|
0x000283F0 SQ_VTX_SEMANTIC_28
|
|
0x000283F4 SQ_VTX_SEMANTIC_29
|
|
0x000283F8 SQ_VTX_SEMANTIC_30
|
|
0x000283FC SQ_VTX_SEMANTIC_31
|
|
0x00028400 VGT_MAX_VTX_INDX
|
|
0x00028404 VGT_MIN_VTX_INDX
|
|
0x00028408 VGT_INDX_OFFSET
|
|
0x0002840C VGT_MULTI_PRIM_IB_RESET_INDX
|
|
0x00028410 SX_ALPHA_TEST_CONTROL
|
|
0x00028414 CB_BLEND_RED
|
|
0x00028418 CB_BLEND_GREEN
|
|
0x0002841C CB_BLEND_BLUE
|
|
0x00028420 CB_BLEND_ALPHA
|
|
0x00028430 DB_STENCILREFMASK
|
|
0x00028434 DB_STENCILREFMASK_BF
|
|
0x00028438 SX_ALPHA_REF
|
|
0x0002843C PA_CL_VPORT_XSCALE_0
|
|
0x00028440 PA_CL_VPORT_XOFFSET_0
|
|
0x00028444 PA_CL_VPORT_YSCALE_0
|
|
0x00028448 PA_CL_VPORT_YOFFSET_0
|
|
0x0002844C PA_CL_VPORT_ZSCALE_0
|
|
0x00028450 PA_CL_VPORT_ZOFFSET_0
|
|
0x00028454 PA_CL_VPORT_XSCALE_1
|
|
0x00028458 PA_CL_VPORT_XOFFSET_1
|
|
0x0002845C PA_CL_VPORT_YSCALE_1
|
|
0x00028460 PA_CL_VPORT_YOFFSET_1
|
|
0x00028464 PA_CL_VPORT_ZSCALE_1
|
|
0x00028468 PA_CL_VPORT_ZOFFSET_1
|
|
0x0002846C PA_CL_VPORT_XSCALE_2
|
|
0x00028470 PA_CL_VPORT_XOFFSET_2
|
|
0x00028474 PA_CL_VPORT_YSCALE_2
|
|
0x00028478 PA_CL_VPORT_YOFFSET_2
|
|
0x0002847C PA_CL_VPORT_ZSCALE_2
|
|
0x00028480 PA_CL_VPORT_ZOFFSET_2
|
|
0x00028484 PA_CL_VPORT_XSCALE_3
|
|
0x00028488 PA_CL_VPORT_XOFFSET_3
|
|
0x0002848C PA_CL_VPORT_YSCALE_3
|
|
0x00028490 PA_CL_VPORT_YOFFSET_3
|
|
0x00028494 PA_CL_VPORT_ZSCALE_3
|
|
0x00028498 PA_CL_VPORT_ZOFFSET_3
|
|
0x0002849C PA_CL_VPORT_XSCALE_4
|
|
0x000284A0 PA_CL_VPORT_XOFFSET_4
|
|
0x000284A4 PA_CL_VPORT_YSCALE_4
|
|
0x000284A8 PA_CL_VPORT_YOFFSET_4
|
|
0x000284AC PA_CL_VPORT_ZSCALE_4
|
|
0x000284B0 PA_CL_VPORT_ZOFFSET_4
|
|
0x000284B4 PA_CL_VPORT_XSCALE_5
|
|
0x000284B8 PA_CL_VPORT_XOFFSET_5
|
|
0x000284BC PA_CL_VPORT_YSCALE_5
|
|
0x000284C0 PA_CL_VPORT_YOFFSET_5
|
|
0x000284C4 PA_CL_VPORT_ZSCALE_5
|
|
0x000284C8 PA_CL_VPORT_ZOFFSET_5
|
|
0x000284CC PA_CL_VPORT_XSCALE_6
|
|
0x000284D0 PA_CL_VPORT_XOFFSET_6
|
|
0x000284D4 PA_CL_VPORT_YSCALE_6
|
|
0x000284D8 PA_CL_VPORT_YOFFSET_6
|
|
0x000284DC PA_CL_VPORT_ZSCALE_6
|
|
0x000284E0 PA_CL_VPORT_ZOFFSET_6
|
|
0x000284E4 PA_CL_VPORT_XSCALE_7
|
|
0x000284E8 PA_CL_VPORT_XOFFSET_7
|
|
0x000284EC PA_CL_VPORT_YSCALE_7
|
|
0x000284F0 PA_CL_VPORT_YOFFSET_7
|
|
0x000284F4 PA_CL_VPORT_ZSCALE_7
|
|
0x000284F8 PA_CL_VPORT_ZOFFSET_7
|
|
0x000284FC PA_CL_VPORT_XSCALE_8
|
|
0x00028500 PA_CL_VPORT_XOFFSET_8
|
|
0x00028504 PA_CL_VPORT_YSCALE_8
|
|
0x00028508 PA_CL_VPORT_YOFFSET_8
|
|
0x0002850C PA_CL_VPORT_ZSCALE_8
|
|
0x00028510 PA_CL_VPORT_ZOFFSET_8
|
|
0x00028514 PA_CL_VPORT_XSCALE_9
|
|
0x00028518 PA_CL_VPORT_XOFFSET_9
|
|
0x0002851C PA_CL_VPORT_YSCALE_9
|
|
0x00028520 PA_CL_VPORT_YOFFSET_9
|
|
0x00028524 PA_CL_VPORT_ZSCALE_9
|
|
0x00028528 PA_CL_VPORT_ZOFFSET_9
|
|
0x0002852C PA_CL_VPORT_XSCALE_10
|
|
0x00028530 PA_CL_VPORT_XOFFSET_10
|
|
0x00028534 PA_CL_VPORT_YSCALE_10
|
|
0x00028538 PA_CL_VPORT_YOFFSET_10
|
|
0x0002853C PA_CL_VPORT_ZSCALE_10
|
|
0x00028540 PA_CL_VPORT_ZOFFSET_10
|
|
0x00028544 PA_CL_VPORT_XSCALE_11
|
|
0x00028548 PA_CL_VPORT_XOFFSET_11
|
|
0x0002854C PA_CL_VPORT_YSCALE_11
|
|
0x00028550 PA_CL_VPORT_YOFFSET_11
|
|
0x00028554 PA_CL_VPORT_ZSCALE_11
|
|
0x00028558 PA_CL_VPORT_ZOFFSET_11
|
|
0x0002855C PA_CL_VPORT_XSCALE_12
|
|
0x00028560 PA_CL_VPORT_XOFFSET_12
|
|
0x00028564 PA_CL_VPORT_YSCALE_12
|
|
0x00028568 PA_CL_VPORT_YOFFSET_12
|
|
0x0002856C PA_CL_VPORT_ZSCALE_12
|
|
0x00028570 PA_CL_VPORT_ZOFFSET_12
|
|
0x00028574 PA_CL_VPORT_XSCALE_13
|
|
0x00028578 PA_CL_VPORT_XOFFSET_13
|
|
0x0002857C PA_CL_VPORT_YSCALE_13
|
|
0x00028580 PA_CL_VPORT_YOFFSET_13
|
|
0x00028584 PA_CL_VPORT_ZSCALE_13
|
|
0x00028588 PA_CL_VPORT_ZOFFSET_13
|
|
0x0002858C PA_CL_VPORT_XSCALE_14
|
|
0x00028590 PA_CL_VPORT_XOFFSET_14
|
|
0x00028594 PA_CL_VPORT_YSCALE_14
|
|
0x00028598 PA_CL_VPORT_YOFFSET_14
|
|
0x0002859C PA_CL_VPORT_ZSCALE_14
|
|
0x000285A0 PA_CL_VPORT_ZOFFSET_14
|
|
0x000285A4 PA_CL_VPORT_XSCALE_15
|
|
0x000285A8 PA_CL_VPORT_XOFFSET_15
|
|
0x000285AC PA_CL_VPORT_YSCALE_15
|
|
0x000285B0 PA_CL_VPORT_YOFFSET_15
|
|
0x000285B4 PA_CL_VPORT_ZSCALE_15
|
|
0x000285B8 PA_CL_VPORT_ZOFFSET_15
|
|
0x000285BC PA_CL_UCP_0_X
|
|
0x000285C0 PA_CL_UCP_0_Y
|
|
0x000285C4 PA_CL_UCP_0_Z
|
|
0x000285C8 PA_CL_UCP_0_W
|
|
0x000285CC PA_CL_UCP_1_X
|
|
0x000285D0 PA_CL_UCP_1_Y
|
|
0x000285D4 PA_CL_UCP_1_Z
|
|
0x000285D8 PA_CL_UCP_1_W
|
|
0x000285DC PA_CL_UCP_2_X
|
|
0x000285E0 PA_CL_UCP_2_Y
|
|
0x000285E4 PA_CL_UCP_2_Z
|
|
0x000285E8 PA_CL_UCP_2_W
|
|
0x000285EC PA_CL_UCP_3_X
|
|
0x000285F0 PA_CL_UCP_3_Y
|
|
0x000285F4 PA_CL_UCP_3_Z
|
|
0x000285F8 PA_CL_UCP_3_W
|
|
0x000285FC PA_CL_UCP_4_X
|
|
0x00028600 PA_CL_UCP_4_Y
|
|
0x00028604 PA_CL_UCP_4_Z
|
|
0x00028608 PA_CL_UCP_4_W
|
|
0x0002860C PA_CL_UCP_5_X
|
|
0x00028610 PA_CL_UCP_5_Y
|
|
0x00028614 PA_CL_UCP_5_Z
|
|
0x00028618 PA_CL_UCP_5_W
|
|
0x0002861C SPI_VS_OUT_ID_0
|
|
0x00028620 SPI_VS_OUT_ID_1
|
|
0x00028624 SPI_VS_OUT_ID_2
|
|
0x00028628 SPI_VS_OUT_ID_3
|
|
0x0002862C SPI_VS_OUT_ID_4
|
|
0x00028630 SPI_VS_OUT_ID_5
|
|
0x00028634 SPI_VS_OUT_ID_6
|
|
0x00028638 SPI_VS_OUT_ID_7
|
|
0x0002863C SPI_VS_OUT_ID_8
|
|
0x00028640 SPI_VS_OUT_ID_9
|
|
0x00028644 SPI_PS_INPUT_CNTL_0
|
|
0x00028648 SPI_PS_INPUT_CNTL_1
|
|
0x0002864C SPI_PS_INPUT_CNTL_2
|
|
0x00028650 SPI_PS_INPUT_CNTL_3
|
|
0x00028654 SPI_PS_INPUT_CNTL_4
|
|
0x00028658 SPI_PS_INPUT_CNTL_5
|
|
0x0002865C SPI_PS_INPUT_CNTL_6
|
|
0x00028660 SPI_PS_INPUT_CNTL_7
|
|
0x00028664 SPI_PS_INPUT_CNTL_8
|
|
0x00028668 SPI_PS_INPUT_CNTL_9
|
|
0x0002866C SPI_PS_INPUT_CNTL_10
|
|
0x00028670 SPI_PS_INPUT_CNTL_11
|
|
0x00028674 SPI_PS_INPUT_CNTL_12
|
|
0x00028678 SPI_PS_INPUT_CNTL_13
|
|
0x0002867C SPI_PS_INPUT_CNTL_14
|
|
0x00028680 SPI_PS_INPUT_CNTL_15
|
|
0x00028684 SPI_PS_INPUT_CNTL_16
|
|
0x00028688 SPI_PS_INPUT_CNTL_17
|
|
0x0002868C SPI_PS_INPUT_CNTL_18
|
|
0x00028690 SPI_PS_INPUT_CNTL_19
|
|
0x00028694 SPI_PS_INPUT_CNTL_20
|
|
0x00028698 SPI_PS_INPUT_CNTL_21
|
|
0x0002869C SPI_PS_INPUT_CNTL_22
|
|
0x000286A0 SPI_PS_INPUT_CNTL_23
|
|
0x000286A4 SPI_PS_INPUT_CNTL_24
|
|
0x000286A8 SPI_PS_INPUT_CNTL_25
|
|
0x000286AC SPI_PS_INPUT_CNTL_26
|
|
0x000286B0 SPI_PS_INPUT_CNTL_27
|
|
0x000286B4 SPI_PS_INPUT_CNTL_28
|
|
0x000286B8 SPI_PS_INPUT_CNTL_29
|
|
0x000286BC SPI_PS_INPUT_CNTL_30
|
|
0x000286C0 SPI_PS_INPUT_CNTL_31
|
|
0x000286C4 SPI_VS_OUT_CONFIG
|
|
0x000286C8 SPI_THREAD_GROUPING
|
|
0x000286CC SPI_PS_IN_CONTROL_0
|
|
0x000286D0 SPI_PS_IN_CONTROL_1
|
|
0x000286D4 SPI_INTERP_CONTROL_0
|
|
0x000286D8 SPI_INPUT_Z
|
|
0x000286DC SPI_FOG_CNTL
|
|
0x000286E0 SPI_BARYC_CNTL
|
|
0x000286E4 SPI_PS_IN_CONTROL_2
|
|
0x000286E8 SPI_COMPUTE_INPUT_CNTL
|
|
0x000286EC SPI_COMPUTE_NUM_THREAD_X
|
|
0x000286F0 SPI_COMPUTE_NUM_THREAD_Y
|
|
0x000286F4 SPI_COMPUTE_NUM_THREAD_Z
|
|
0x00028720 GDS_ADDR_BASE
|
|
0x00028724 GDS_ADDR_SIZE
|
|
0x00028728 GDS_ORDERED_WAVE_PER_SE
|
|
0x00028780 CB_BLEND0_CONTROL
|
|
0x00028784 CB_BLEND1_CONTROL
|
|
0x00028788 CB_BLEND2_CONTROL
|
|
0x0002878C CB_BLEND3_CONTROL
|
|
0x00028790 CB_BLEND4_CONTROL
|
|
0x00028794 CB_BLEND5_CONTROL
|
|
0x00028798 CB_BLEND6_CONTROL
|
|
0x0002879C CB_BLEND7_CONTROL
|
|
0x000287CC CS_COPY_STATE
|
|
0x000287D0 GFX_COPY_STATE
|
|
0x000287D4 PA_CL_POINT_X_RAD
|
|
0x000287D8 PA_CL_POINT_Y_RAD
|
|
0x000287DC PA_CL_POINT_SIZE
|
|
0x000287E0 PA_CL_POINT_CULL_RAD
|
|
0x00028808 CB_COLOR_CONTROL
|
|
0x0002880C DB_SHADER_CONTROL
|
|
0x00028810 PA_CL_CLIP_CNTL
|
|
0x00028814 PA_SU_SC_MODE_CNTL
|
|
0x00028818 PA_CL_VTE_CNTL
|
|
0x0002881C PA_CL_VS_OUT_CNTL
|
|
0x00028820 PA_CL_NANINF_CNTL
|
|
0x00028824 PA_SU_LINE_STIPPLE_CNTL
|
|
0x00028828 PA_SU_LINE_STIPPLE_SCALE
|
|
0x0002882C PA_SU_PRIM_FILTER_CNTL
|
|
0x00028838 SQ_DYN_GPR_RESOURCE_LIMIT_1
|
|
0x00028844 SQ_PGM_RESOURCES_PS
|
|
0x00028848 SQ_PGM_RESOURCES_2_PS
|
|
0x0002884C SQ_PGM_EXPORTS_PS
|
|
0x00028860 SQ_PGM_RESOURCES_VS
|
|
0x00028864 SQ_PGM_RESOURCES_2_VS
|
|
0x00028878 SQ_PGM_RESOURCES_GS
|
|
0x0002887C SQ_PGM_RESOURCES_2_GS
|
|
0x00028890 SQ_PGM_RESOURCES_ES
|
|
0x00028894 SQ_PGM_RESOURCES_2_ES
|
|
0x000288A8 SQ_PGM_RESOURCES_FS
|
|
0x000288BC SQ_PGM_RESOURCES_HS
|
|
0x000288C0 SQ_PGM_RESOURCES_2_HS
|
|
0x000288D4 SQ_PGM_RESOURCES_LS
|
|
0x000288D8 SQ_PGM_RESOURCES_2_LS
|
|
0x000288E8 SQ_LDS_ALLOC
|
|
0x000288EC SQ_LDS_ALLOC_PS
|
|
0x000288F0 SQ_VTX_SEMANTIC_CLEAR
|
|
0x00028A00 PA_SU_POINT_SIZE
|
|
0x00028A04 PA_SU_POINT_MINMAX
|
|
0x00028A08 PA_SU_LINE_CNTL
|
|
0x00028A0C PA_SC_LINE_STIPPLE
|
|
0x00028A10 VGT_OUTPUT_PATH_CNTL
|
|
0x00028A14 VGT_HOS_CNTL
|
|
0x00028A18 VGT_HOS_MAX_TESS_LEVEL
|
|
0x00028A1C VGT_HOS_MIN_TESS_LEVEL
|
|
0x00028A20 VGT_HOS_REUSE_DEPTH
|
|
0x00028A24 VGT_GROUP_PRIM_TYPE
|
|
0x00028A28 VGT_GROUP_FIRST_DECR
|
|
0x00028A2C VGT_GROUP_DECR
|
|
0x00028A30 VGT_GROUP_VECT_0_CNTL
|
|
0x00028A34 VGT_GROUP_VECT_1_CNTL
|
|
0x00028A38 VGT_GROUP_VECT_0_FMT_CNTL
|
|
0x00028A3C VGT_GROUP_VECT_1_FMT_CNTL
|
|
0x00028A40 VGT_GS_MODE
|
|
0x00028A48 PA_SC_MODE_CNTL_0
|
|
0x00028A4C PA_SC_MODE_CNTL_1
|
|
0x00028A50 VGT_ENHANCE
|
|
0x00028A54 VGT_GS_PER_ES
|
|
0x00028A58 VGT_ES_PER_GS
|
|
0x00028A5C VGT_GS_PER_VS
|
|
0x00028A6C VGT_GS_OUT_PRIM_TYPE
|
|
0x00028A84 VGT_PRIMITIVEID_EN
|
|
0x00028A94 VGT_MULTI_PRIM_IB_RESET_EN
|
|
0x00028AA0 VGT_INSTANCE_STEP_RATE_0
|
|
0x00028AA4 VGT_INSTANCE_STEP_RATE_1
|
|
0x00028AB4 VGT_REUSE_OFF
|
|
0x00028AB8 VGT_VTX_CNT_EN
|
|
0x00028AC0 DB_SRESULTS_COMPARE_STATE0
|
|
0x00028AC4 DB_SRESULTS_COMPARE_STATE1
|
|
0x00028AC8 DB_PRELOAD_CONTROL
|
|
0x00028AD4 VGT_STRMOUT_VTX_STRIDE_0
|
|
0x00028AE4 VGT_STRMOUT_VTX_STRIDE_1
|
|
0x00028AF4 VGT_STRMOUT_VTX_STRIDE_2
|
|
0x00028B04 VGT_STRMOUT_VTX_STRIDE_3
|
|
0x00028B28 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
|
|
0x00028B2C VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
|
|
0x00028B30 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
|
|
0x00028B38 VGT_GS_MAX_VERT_OUT
|
|
0x00028B54 VGT_SHADER_STAGES_EN
|
|
0x00028B58 VGT_LS_HS_CONFIG
|
|
0x00028B5C VGT_LS_SIZE
|
|
0x00028B60 VGT_HS_SIZE
|
|
0x00028B64 VGT_LS_HS_ALLOC
|
|
0x00028B68 VGT_HS_PATCH_CONST
|
|
0x00028B6C VGT_TF_PARAM
|
|
0x00028B70 DB_ALPHA_TO_MASK
|
|
0x00028B74 VGT_DISPATCH_INITIATOR
|
|
0x00028B78 PA_SU_POLY_OFFSET_DB_FMT_CNTL
|
|
0x00028B7C PA_SU_POLY_OFFSET_CLAMP
|
|
0x00028B80 PA_SU_POLY_OFFSET_FRONT_SCALE
|
|
0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET
|
|
0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE
|
|
0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET
|
|
0x00028B74 VGT_GS_INSTANCE_CNT
|
|
0x00028C00 PA_SC_LINE_CNTL
|
|
0x00028C08 PA_SU_VTX_CNTL
|
|
0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
|
|
0x00028C10 PA_CL_GB_VERT_DISC_ADJ
|
|
0x00028C14 PA_CL_GB_HORZ_CLIP_ADJ
|
|
0x00028C18 PA_CL_GB_HORZ_DISC_ADJ
|
|
0x00028C1C PA_SC_AA_SAMPLE_LOCS_0
|
|
0x00028C20 PA_SC_AA_SAMPLE_LOCS_1
|
|
0x00028C24 PA_SC_AA_SAMPLE_LOCS_2
|
|
0x00028C28 PA_SC_AA_SAMPLE_LOCS_3
|
|
0x00028C2C PA_SC_AA_SAMPLE_LOCS_4
|
|
0x00028C30 PA_SC_AA_SAMPLE_LOCS_5
|
|
0x00028C34 PA_SC_AA_SAMPLE_LOCS_6
|
|
0x00028C38 PA_SC_AA_SAMPLE_LOCS_7
|
|
0x00028C3C PA_SC_AA_MASK
|
|
0x00028C78 CB_COLOR0_DIM
|
|
0x00028CB4 CB_COLOR1_DIM
|
|
0x00028CF0 CB_COLOR2_DIM
|
|
0x00028D2C CB_COLOR3_DIM
|
|
0x00028D68 CB_COLOR4_DIM
|
|
0x00028DA4 CB_COLOR5_DIM
|
|
0x00028DE0 CB_COLOR6_DIM
|
|
0x00028E1C CB_COLOR7_DIM
|
|
0x00028E58 CB_COLOR8_DIM
|
|
0x00028E74 CB_COLOR9_DIM
|
|
0x00028E90 CB_COLOR10_DIM
|
|
0x00028EAC CB_COLOR11_DIM
|
|
0x00028C8C CB_COLOR0_CLEAR_WORD0
|
|
0x00028C90 CB_COLOR0_CLEAR_WORD1
|
|
0x00028C94 CB_COLOR0_CLEAR_WORD2
|
|
0x00028C98 CB_COLOR0_CLEAR_WORD3
|
|
0x00028CC8 CB_COLOR1_CLEAR_WORD0
|
|
0x00028CCC CB_COLOR1_CLEAR_WORD1
|
|
0x00028CD0 CB_COLOR1_CLEAR_WORD2
|
|
0x00028CD4 CB_COLOR1_CLEAR_WORD3
|
|
0x00028D04 CB_COLOR2_CLEAR_WORD0
|
|
0x00028D08 CB_COLOR2_CLEAR_WORD1
|
|
0x00028D0C CB_COLOR2_CLEAR_WORD2
|
|
0x00028D10 CB_COLOR2_CLEAR_WORD3
|
|
0x00028D40 CB_COLOR3_CLEAR_WORD0
|
|
0x00028D44 CB_COLOR3_CLEAR_WORD1
|
|
0x00028D48 CB_COLOR3_CLEAR_WORD2
|
|
0x00028D4C CB_COLOR3_CLEAR_WORD3
|
|
0x00028D7C CB_COLOR4_CLEAR_WORD0
|
|
0x00028D80 CB_COLOR4_CLEAR_WORD1
|
|
0x00028D84 CB_COLOR4_CLEAR_WORD2
|
|
0x00028D88 CB_COLOR4_CLEAR_WORD3
|
|
0x00028DB8 CB_COLOR5_CLEAR_WORD0
|
|
0x00028DBC CB_COLOR5_CLEAR_WORD1
|
|
0x00028DC0 CB_COLOR5_CLEAR_WORD2
|
|
0x00028DC4 CB_COLOR5_CLEAR_WORD3
|
|
0x00028DF4 CB_COLOR6_CLEAR_WORD0
|
|
0x00028DF8 CB_COLOR6_CLEAR_WORD1
|
|
0x00028DFC CB_COLOR6_CLEAR_WORD2
|
|
0x00028E00 CB_COLOR6_CLEAR_WORD3
|
|
0x00028E30 CB_COLOR7_CLEAR_WORD0
|
|
0x00028E34 CB_COLOR7_CLEAR_WORD1
|
|
0x00028E38 CB_COLOR7_CLEAR_WORD2
|
|
0x00028E3C CB_COLOR7_CLEAR_WORD3
|
|
0x00028F80 SQ_ALU_CONST_BUFFER_SIZE_HS_0
|
|
0x00028F84 SQ_ALU_CONST_BUFFER_SIZE_HS_1
|
|
0x00028F88 SQ_ALU_CONST_BUFFER_SIZE_HS_2
|
|
0x00028F8C SQ_ALU_CONST_BUFFER_SIZE_HS_3
|
|
0x00028F90 SQ_ALU_CONST_BUFFER_SIZE_HS_4
|
|
0x00028F94 SQ_ALU_CONST_BUFFER_SIZE_HS_5
|
|
0x00028F98 SQ_ALU_CONST_BUFFER_SIZE_HS_6
|
|
0x00028F9C SQ_ALU_CONST_BUFFER_SIZE_HS_7
|
|
0x00028FA0 SQ_ALU_CONST_BUFFER_SIZE_HS_8
|
|
0x00028FA4 SQ_ALU_CONST_BUFFER_SIZE_HS_9
|
|
0x00028FA8 SQ_ALU_CONST_BUFFER_SIZE_HS_10
|
|
0x00028FAC SQ_ALU_CONST_BUFFER_SIZE_HS_11
|
|
0x00028FB0 SQ_ALU_CONST_BUFFER_SIZE_HS_12
|
|
0x00028FB4 SQ_ALU_CONST_BUFFER_SIZE_HS_13
|
|
0x00028FB8 SQ_ALU_CONST_BUFFER_SIZE_HS_14
|
|
0x00028FBC SQ_ALU_CONST_BUFFER_SIZE_HS_15
|
|
0x00028FC0 SQ_ALU_CONST_BUFFER_SIZE_LS_0
|
|
0x00028FC4 SQ_ALU_CONST_BUFFER_SIZE_LS_1
|
|
0x00028FC8 SQ_ALU_CONST_BUFFER_SIZE_LS_2
|
|
0x00028FCC SQ_ALU_CONST_BUFFER_SIZE_LS_3
|
|
0x00028FD0 SQ_ALU_CONST_BUFFER_SIZE_LS_4
|
|
0x00028FD4 SQ_ALU_CONST_BUFFER_SIZE_LS_5
|
|
0x00028FD8 SQ_ALU_CONST_BUFFER_SIZE_LS_6
|
|
0x00028FDC SQ_ALU_CONST_BUFFER_SIZE_LS_7
|
|
0x00028FE0 SQ_ALU_CONST_BUFFER_SIZE_LS_8
|
|
0x00028FE4 SQ_ALU_CONST_BUFFER_SIZE_LS_9
|
|
0x00028FE8 SQ_ALU_CONST_BUFFER_SIZE_LS_10
|
|
0x00028FEC SQ_ALU_CONST_BUFFER_SIZE_LS_11
|
|
0x00028FF0 SQ_ALU_CONST_BUFFER_SIZE_LS_12
|
|
0x00028FF4 SQ_ALU_CONST_BUFFER_SIZE_LS_13
|
|
0x00028FF8 SQ_ALU_CONST_BUFFER_SIZE_LS_14
|
|
0x00028FFC SQ_ALU_CONST_BUFFER_SIZE_LS_15
|
|
0x0003CFF0 SQ_VTX_BASE_VTX_LOC
|
|
0x0003CFF4 SQ_VTX_START_INST_LOC
|
|
0x0003FF00 SQ_TEX_SAMPLER_CLEAR
|
|
0x0003FF04 SQ_TEX_RESOURCE_CLEAR
|
|
0x0003FF08 SQ_LOOP_BOOL_CLEAR
|