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e04585184d
No need to initialize the PHY from the driver's probe. It is done by the core automatically and doing it twice would increment the phy->powercount counter to 2 instead of 1. During later suspend operation, the counter will be decremented to one, no phy->power_off() will occur and worse than that, the following phy->power_on() at resume time will also be skipped, failing the whole S2RAM operation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
362 lines
8.6 KiB
C
362 lines
8.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* drivers/usb/host/ehci-orion.c
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*
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* Tzachi Perelstein <tzachi@marvell.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/mbus.h>
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#include <linux/clk.h>
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#include <linux/platform_data/usb-ehci-orion.h>
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#include <linux/of.h>
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#include <linux/phy/phy.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include "ehci.h"
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#define rdl(off) readl_relaxed(hcd->regs + (off))
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#define wrl(off, val) writel_relaxed((val), hcd->regs + (off))
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#define USB_CMD 0x140
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#define USB_CMD_RUN BIT(0)
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#define USB_CMD_RESET BIT(1)
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#define USB_MODE 0x1a8
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#define USB_MODE_MASK GENMASK(1, 0)
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#define USB_MODE_DEVICE 0x2
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#define USB_MODE_HOST 0x3
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#define USB_MODE_SDIS BIT(4)
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#define USB_CAUSE 0x310
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#define USB_MASK 0x314
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#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
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#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
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#define USB_IPG 0x360
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#define USB_PHY_PWR_CTRL 0x400
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#define USB_PHY_TX_CTRL 0x420
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#define USB_PHY_RX_CTRL 0x430
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#define USB_PHY_IVREF_CTRL 0x440
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#define USB_PHY_TST_GRP_CTRL 0x450
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#define USB_SBUSCFG 0x90
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/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
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#define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6)
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#define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3)
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/* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */
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#define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0)
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#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \
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| USB_SBUSCFG_BARD_ALIGN_128B \
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| USB_SBUSCFG_AHBBRST_INCR16)
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#define DRIVER_DESC "EHCI orion driver"
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#define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
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struct orion_ehci_hcd {
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struct clk *clk;
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struct phy *phy;
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};
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static const char hcd_name[] = "ehci-orion";
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static struct hc_driver __read_mostly ehci_orion_hc_driver;
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/*
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* Implement Orion USB controller specification guidelines
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*/
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static void orion_usb_phy_v1_setup(struct usb_hcd *hcd)
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{
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/* The below GLs are according to the Orion Errata document */
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/*
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* Clear interrupt cause and mask
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*/
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wrl(USB_CAUSE, 0);
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wrl(USB_MASK, 0);
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/*
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* Reset controller
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*/
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wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
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while (rdl(USB_CMD) & USB_CMD_RESET);
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/*
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* GL# USB-10: Set IPG for non start of frame packets
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* Bits[14:8]=0xc
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*/
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wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
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/*
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* GL# USB-9: USB 2.0 Power Control
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* BG_VSEL[7:6]=0x1
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*/
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wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
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/*
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* GL# USB-1: USB PHY Tx Control - force calibration to '8'
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* TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8
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*/
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wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
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/*
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* GL# USB-3 GL# USB-9: USB PHY Rx Control
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* RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0,
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* CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1
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*/
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wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
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/*
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* GL# USB-3 GL# USB-9: USB PHY IVREF Control
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* PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0
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*/
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wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
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/*
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* GL# USB-3 GL# USB-9: USB PHY Test Group Control
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* REG_FIFO_SQ_RST[15]=0
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*/
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wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
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/*
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* Stop and reset controller
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*/
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wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
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wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
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while (rdl(USB_CMD) & USB_CMD_RESET);
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/*
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* GL# USB-5 Streaming disable REG_USB_MODE[4]=1
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* TBD: This need to be done after each reset!
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* GL# USB-4 Setup USB Host mode
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*/
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wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
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}
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static void
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ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
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const struct mbus_dram_target_info *dram)
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{
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int i;
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for (i = 0; i < 4; i++) {
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wrl(USB_WINDOW_CTRL(i), 0);
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wrl(USB_WINDOW_BASE(i), 0);
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}
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for (i = 0; i < dram->num_cs; i++) {
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const struct mbus_dram_window *cs = dram->cs + i;
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wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
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(cs->mbus_attr << 8) |
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(dram->mbus_dram_target_id << 4) | 1);
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wrl(USB_WINDOW_BASE(i), cs->base);
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}
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}
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static int ehci_orion_drv_reset(struct usb_hcd *hcd)
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{
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struct device *dev = hcd->self.controller;
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int ret;
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ret = ehci_setup(hcd);
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if (ret)
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return ret;
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/*
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* For SoC without hlock, need to program sbuscfg value to guarantee
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* AHB master's burst would not overrun or underrun FIFO.
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*
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* sbuscfg reg has to be set after usb controller reset, otherwise
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* the value would be override to 0.
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*/
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if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
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wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
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return ret;
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}
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static const struct ehci_driver_overrides orion_overrides __initconst = {
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.extra_priv_size = sizeof(struct orion_ehci_hcd),
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.reset = ehci_orion_drv_reset,
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};
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static int ehci_orion_drv_probe(struct platform_device *pdev)
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{
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struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev);
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const struct mbus_dram_target_info *dram;
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struct resource *res;
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struct usb_hcd *hcd;
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struct ehci_hcd *ehci;
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void __iomem *regs;
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int irq, err;
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enum orion_ehci_phy_ver phy_version;
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struct orion_ehci_hcd *priv;
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if (usb_disabled())
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return -ENODEV;
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pr_debug("Initializing Orion-SoC USB Host Controller\n");
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_err(&pdev->dev,
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"Found HC with no IRQ. Check %s setup!\n",
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dev_name(&pdev->dev));
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err = -ENODEV;
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goto err;
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}
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/*
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* Right now device-tree probed devices don't get dma_mask
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* set. Since shared usb code relies on it, set it here for
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* now. Once we have dma capability bindings this can go away.
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*/
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err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
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if (err)
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goto err;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(regs)) {
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err = PTR_ERR(regs);
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goto err;
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}
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hcd = usb_create_hcd(&ehci_orion_hc_driver,
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&pdev->dev, dev_name(&pdev->dev));
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if (!hcd) {
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err = -ENOMEM;
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goto err;
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}
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = resource_size(res);
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hcd->regs = regs;
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ehci = hcd_to_ehci(hcd);
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ehci->caps = hcd->regs + 0x100;
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hcd->has_tt = 1;
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priv = hcd_to_orion_priv(hcd);
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/*
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* Not all platforms can gate the clock, so it is not an error if
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* the clock does not exists.
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*/
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priv->clk = devm_clk_get(&pdev->dev, NULL);
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if (!IS_ERR(priv->clk))
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clk_prepare_enable(priv->clk);
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priv->phy = devm_phy_optional_get(&pdev->dev, "usb");
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if (IS_ERR(priv->phy)) {
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err = PTR_ERR(priv->phy);
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if (err != -ENOSYS)
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goto err_dis_clk;
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}
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/*
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* (Re-)program MBUS remapping windows if we are asked to.
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*/
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dram = mv_mbus_dram_info();
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if (dram)
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ehci_orion_conf_mbus_windows(hcd, dram);
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/*
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* setup Orion USB controller.
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*/
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if (pdev->dev.of_node)
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phy_version = EHCI_PHY_NA;
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else
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phy_version = pd->phy_version;
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switch (phy_version) {
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case EHCI_PHY_NA: /* dont change USB phy settings */
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break;
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case EHCI_PHY_ORION:
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orion_usb_phy_v1_setup(hcd);
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break;
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case EHCI_PHY_DD:
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case EHCI_PHY_KW:
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default:
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dev_warn(&pdev->dev, "USB phy version isn't supported.\n");
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}
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err = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (err)
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goto err_dis_clk;
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device_wakeup_enable(hcd->self.controller);
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return 0;
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err_dis_clk:
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if (!IS_ERR(priv->clk))
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clk_disable_unprepare(priv->clk);
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usb_put_hcd(hcd);
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err:
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dev_err(&pdev->dev, "init %s fail, %d\n",
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dev_name(&pdev->dev), err);
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return err;
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}
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static int ehci_orion_drv_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd);
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usb_remove_hcd(hcd);
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if (!IS_ERR(priv->clk))
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clk_disable_unprepare(priv->clk);
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usb_put_hcd(hcd);
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return 0;
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}
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static const struct of_device_id ehci_orion_dt_ids[] = {
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{ .compatible = "marvell,orion-ehci", },
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{ .compatible = "marvell,armada-3700-ehci", },
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{},
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};
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MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
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static struct platform_driver ehci_orion_driver = {
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.probe = ehci_orion_drv_probe,
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.remove = ehci_orion_drv_remove,
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.shutdown = usb_hcd_platform_shutdown,
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.driver = {
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.name = "orion-ehci",
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.of_match_table = ehci_orion_dt_ids,
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},
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};
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static int __init ehci_orion_init(void)
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{
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if (usb_disabled())
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return -ENODEV;
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pr_info("%s: " DRIVER_DESC "\n", hcd_name);
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ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides);
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return platform_driver_register(&ehci_orion_driver);
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}
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module_init(ehci_orion_init);
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static void __exit ehci_orion_cleanup(void)
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{
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platform_driver_unregister(&ehci_orion_driver);
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}
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module_exit(ehci_orion_cleanup);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_ALIAS("platform:orion-ehci");
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MODULE_AUTHOR("Tzachi Perelstein");
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MODULE_LICENSE("GPL v2");
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