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4d0824608a
The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240208202822.631449-1-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
552 lines
16 KiB
C
552 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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* Copyright 2017-2018 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*
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* Implementation of the SCU based Power Domains
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*
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* NOTE: a better implementation suggested by Ulf Hansson is using a
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* single global power domain and implement the ->attach|detach_dev()
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* callback for the genpd and use the regular of_genpd_add_provider_simple().
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* From within the ->attach_dev(), we could get the OF node for
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* the device that is being attached and then parse the power-domain
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* cell containing the "resource id" and store that in the per device
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* struct generic_pm_domain_data (we have void pointer there for
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* storing these kind of things).
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*
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* Additionally, we need to implement the ->stop() and ->start()
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* callbacks of genpd, which is where you "power on/off" devices,
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* rather than using the above ->power_on|off() callbacks.
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*
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* However, there're two known issues:
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* 1. The ->attach_dev() of power domain infrastructure still does
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* not support multi domains case as the struct device *dev passed
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* in is a virtual PD device, it does not help for parsing the real
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* device resource id from device tree, so it's unware of which
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* real sub power domain of device should be attached.
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*
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* The framework needs some proper extension to support multi power
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* domain cases.
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*
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* Update: Genpd assigns the ->of_node for the virtual device before it
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* invokes ->attach_dev() callback, hence parsing for device resources via
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* DT should work fine.
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*
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* 2. It also breaks most of current drivers as the driver probe sequence
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* behavior changed if removing ->power_on|off() callback and use
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* ->start() and ->stop() instead. genpd_dev_pm_attach will only power
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* up the domain and attach device, but will not call .start() which
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* relies on device runtime pm. That means the device power is still
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* not up before running driver probe function. For SCU enabled
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* platforms, all device drivers accessing registers/clock without power
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* domain enabled will trigger a HW access error. That means we need fix
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* most drivers probe sequence with proper runtime pm.
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*
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* Update: Runtime PM support isn't necessary. Instead, this can easily be
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* fixed in drivers by adding a call to dev_pm_domain_start() during probe.
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*
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* In summary, the second part needs to be addressed via minor updates to the
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* relevant drivers, before the "single global power domain" model can be used.
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*
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*/
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include <linux/console.h>
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#include <linux/firmware/imx/sci.h>
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#include <linux/firmware/imx/svc/rm.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_domain.h>
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#include <linux/slab.h>
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/* SCU Power Mode Protocol definition */
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struct imx_sc_msg_req_set_resource_power_mode {
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struct imx_sc_rpc_msg hdr;
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u16 resource;
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u8 mode;
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} __packed __aligned(4);
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struct req_get_resource_mode {
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u16 resource;
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};
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struct resp_get_resource_mode {
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u8 mode;
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};
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struct imx_sc_msg_req_get_resource_power_mode {
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struct imx_sc_rpc_msg hdr;
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union {
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struct req_get_resource_mode req;
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struct resp_get_resource_mode resp;
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} data;
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} __packed __aligned(4);
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#define IMX_SCU_PD_NAME_SIZE 20
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struct imx_sc_pm_domain {
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struct generic_pm_domain pd;
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char name[IMX_SCU_PD_NAME_SIZE];
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u32 rsrc;
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};
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struct imx_sc_pd_range {
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char *name;
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u32 rsrc;
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u8 num;
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/* add domain index */
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bool postfix;
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u8 start_from;
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};
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struct imx_sc_pd_soc {
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const struct imx_sc_pd_range *pd_ranges;
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u8 num_ranges;
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};
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static int imx_con_rsrc;
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/* Align with the IMX_SC_PM_PW_MODE_[OFF,STBY,LP,ON] macros */
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static const char * const imx_sc_pm_mode[] = {
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"IMX_SC_PM_PW_MODE_OFF",
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"IMX_SC_PM_PW_MODE_STBY",
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"IMX_SC_PM_PW_MODE_LP",
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"IMX_SC_PM_PW_MODE_ON"
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};
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static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
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/* LSIO SS */
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{ "pwm", IMX_SC_R_PWM_0, 8, true, 0 },
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{ "gpio", IMX_SC_R_GPIO_0, 8, true, 0 },
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{ "gpt", IMX_SC_R_GPT_0, 5, true, 0 },
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{ "kpp", IMX_SC_R_KPP, 1, false, 0 },
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{ "fspi", IMX_SC_R_FSPI_0, 2, true, 0 },
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{ "mu_a", IMX_SC_R_MU_0A, 14, true, 0 },
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{ "mu_b", IMX_SC_R_MU_5B, 9, true, 5 },
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/* CONN SS */
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{ "usb", IMX_SC_R_USB_0, 2, true, 0 },
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{ "usb0phy", IMX_SC_R_USB_0_PHY, 1, false, 0 },
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{ "usb1phy", IMX_SC_R_USB_1_PHY, 1, false, 0},
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{ "usb2", IMX_SC_R_USB_2, 1, false, 0 },
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{ "usb2phy", IMX_SC_R_USB_2_PHY, 1, false, 0 },
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{ "sdhc", IMX_SC_R_SDHC_0, 3, true, 0 },
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{ "enet", IMX_SC_R_ENET_0, 2, true, 0 },
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{ "nand", IMX_SC_R_NAND, 1, false, 0 },
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{ "mlb", IMX_SC_R_MLB_0, 1, true, 0 },
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/* AUDIO SS */
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{ "audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 },
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{ "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 },
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{ "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 },
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{ "audio-clk-1", IMX_SC_R_AUDIO_CLK_1, 1, false, 0 },
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{ "mclk-out-0", IMX_SC_R_MCLK_OUT_0, 1, false, 0 },
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{ "mclk-out-1", IMX_SC_R_MCLK_OUT_1, 1, false, 0 },
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{ "dma0-ch", IMX_SC_R_DMA_0_CH0, 32, true, 0 },
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{ "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 },
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{ "dma2-ch-0", IMX_SC_R_DMA_2_CH0, 5, true, 0 },
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{ "dma2-ch-1", IMX_SC_R_DMA_2_CH5, 27, true, 0 },
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{ "dma3-ch", IMX_SC_R_DMA_3_CH0, 32, true, 0 },
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{ "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 },
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{ "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 },
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{ "esai0", IMX_SC_R_ESAI_0, 1, false, 0 },
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{ "esai1", IMX_SC_R_ESAI_1, 1, false, 0 },
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{ "spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 },
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{ "spdif1", IMX_SC_R_SPDIF_1, 1, false, 0 },
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{ "sai", IMX_SC_R_SAI_0, 3, true, 0 },
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{ "sai3", IMX_SC_R_SAI_3, 1, false, 0 },
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{ "sai4", IMX_SC_R_SAI_4, 1, false, 0 },
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{ "sai5", IMX_SC_R_SAI_5, 1, false, 0 },
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{ "sai6", IMX_SC_R_SAI_6, 1, false, 0 },
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{ "sai7", IMX_SC_R_SAI_7, 1, false, 0 },
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{ "amix", IMX_SC_R_AMIX, 1, false, 0 },
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{ "mqs0", IMX_SC_R_MQS_0, 1, false, 0 },
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{ "dsp", IMX_SC_R_DSP, 1, false, 0 },
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{ "dsp-ram", IMX_SC_R_DSP_RAM, 1, false, 0 },
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/* DMA SS */
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{ "can", IMX_SC_R_CAN_0, 3, true, 0 },
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{ "ftm", IMX_SC_R_FTM_0, 2, true, 0 },
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{ "lpi2c", IMX_SC_R_I2C_0, 5, true, 0 },
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{ "adc", IMX_SC_R_ADC_0, 2, true, 0 },
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{ "lcd", IMX_SC_R_LCD_0, 1, true, 0 },
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{ "lcd-pll", IMX_SC_R_ELCDIF_PLL, 1, true, 0 },
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{ "lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 },
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{ "lpuart", IMX_SC_R_UART_0, 5, true, 0 },
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{ "sim", IMX_SC_R_EMVSIM_0, 2, true, 0 },
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{ "lpspi", IMX_SC_R_SPI_0, 4, true, 0 },
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{ "irqstr_dsp", IMX_SC_R_IRQSTR_DSP, 1, false, 0 },
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/* VPU SS */
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{ "vpu", IMX_SC_R_VPU, 1, false, 0 },
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{ "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 },
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{ "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 },
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{ "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false, 0 },
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{ "vpu-enc1", IMX_SC_R_VPU_ENC_1, 1, false, 0 },
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{ "vpu-mu0", IMX_SC_R_VPU_MU_0, 1, false, 0 },
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{ "vpu-mu1", IMX_SC_R_VPU_MU_1, 1, false, 0 },
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{ "vpu-mu2", IMX_SC_R_VPU_MU_2, 1, false, 0 },
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/* GPU SS */
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{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
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{ "gpu1-pid", IMX_SC_R_GPU_1_PID0, 4, true, 0 },
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/* HSIO SS */
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{ "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 },
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{ "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 },
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{ "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
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{ "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
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{ "sata-0", IMX_SC_R_SATA_0, 1, false, 0 },
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{ "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
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/* MIPI SS */
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{ "mipi0", IMX_SC_R_MIPI_0, 1, false, 0 },
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{ "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, false, 0 },
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{ "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, true, 0 },
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{ "mipi1", IMX_SC_R_MIPI_1, 1, false, 0 },
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{ "mipi1-pwm0", IMX_SC_R_MIPI_1_PWM_0, 1, false, 0 },
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{ "mipi1-i2c", IMX_SC_R_MIPI_1_I2C_0, 2, true, 0 },
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/* LVDS SS */
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{ "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 },
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{ "lvds0-pwm", IMX_SC_R_LVDS_0_PWM_0, 1, false, 0 },
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{ "lvds0-lpi2c", IMX_SC_R_LVDS_0_I2C_0, 2, true, 0 },
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{ "lvds1", IMX_SC_R_LVDS_1, 1, false, 0 },
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{ "lvds1-pwm", IMX_SC_R_LVDS_1_PWM_0, 1, false, 0 },
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{ "lvds1-lpi2c", IMX_SC_R_LVDS_1_I2C_0, 2, true, 0 },
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{ "mipi1", IMX_SC_R_MIPI_1, 1, 0 },
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{ "mipi1-pwm0", IMX_SC_R_MIPI_1_PWM_0, 1, 0 },
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{ "mipi1-i2c", IMX_SC_R_MIPI_1_I2C_0, 2, 1 },
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{ "lvds1", IMX_SC_R_LVDS_1, 1, 0 },
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/* DC SS */
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{ "dc0", IMX_SC_R_DC_0, 1, false, 0 },
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{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
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{ "dc0-video", IMX_SC_R_DC_0_VIDEO0, 2, true, 0 },
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{ "dc1", IMX_SC_R_DC_1, 1, false, 0 },
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{ "dc1-pll", IMX_SC_R_DC_1_PLL_0, 2, true, 0 },
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{ "dc1-video", IMX_SC_R_DC_1_VIDEO0, 2, true, 0 },
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/* CM40 SS */
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{ "cm40-i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
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{ "cm40-intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
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{ "cm40-pid", IMX_SC_R_M4_0_PID0, 5, true, 0},
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{ "cm40-mu-a1", IMX_SC_R_M4_0_MU_1A, 1, false, 0},
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{ "cm40-lpuart", IMX_SC_R_M4_0_UART, 1, false, 0},
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/* CM41 SS */
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{ "cm41-i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 },
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{ "cm41-intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 },
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{ "cm41-pid", IMX_SC_R_M4_1_PID0, 5, true, 0},
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{ "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0},
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{ "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0},
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/* CM41 SS */
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{ "cm41_i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 },
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{ "cm41_intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 },
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/* DB SS */
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{ "perf", IMX_SC_R_PERF, 1, false, 0},
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/* IMAGE SS */
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{ "img-jpegdec-mp", IMX_SC_R_MJPEG_DEC_MP, 1, false, 0 },
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{ "img-jpegdec-s0", IMX_SC_R_MJPEG_DEC_S0, 4, true, 0 },
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{ "img-jpegenc-mp", IMX_SC_R_MJPEG_ENC_MP, 1, false, 0 },
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{ "img-jpegenc-s0", IMX_SC_R_MJPEG_ENC_S0, 4, true, 0 },
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/* SECO SS */
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{ "seco_mu", IMX_SC_R_SECO_MU_2, 3, true, 2},
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/* V2X SS */
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{ "v2x_mu", IMX_SC_R_V2X_MU_0, 2, true, 0},
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{ "v2x_mu", IMX_SC_R_V2X_MU_2, 1, true, 2},
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{ "v2x_mu", IMX_SC_R_V2X_MU_3, 2, true, 3},
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{ "img-pdma", IMX_SC_R_ISI_CH0, 8, true, 0 },
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{ "img-csi0", IMX_SC_R_CSI_0, 1, false, 0 },
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{ "img-csi0-i2c0", IMX_SC_R_CSI_0_I2C_0, 1, false, 0 },
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{ "img-csi0-pwm0", IMX_SC_R_CSI_0_PWM_0, 1, false, 0 },
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{ "img-csi1", IMX_SC_R_CSI_1, 1, false, 0 },
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{ "img-csi1-i2c0", IMX_SC_R_CSI_1_I2C_0, 1, false, 0 },
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{ "img-csi1-pwm0", IMX_SC_R_CSI_1_PWM_0, 1, false, 0 },
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{ "img-parallel", IMX_SC_R_PI_0, 1, false, 0 },
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{ "img-parallel-i2c0", IMX_SC_R_PI_0_I2C_0, 1, false, 0 },
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{ "img-parallel-pwm0", IMX_SC_R_PI_0_PWM_0, 2, true, 0 },
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{ "img-parallel-pll", IMX_SC_R_PI_0_PLL, 1, false, 0 },
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/* HDMI TX SS */
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{ "hdmi-tx", IMX_SC_R_HDMI, 1, false, 0},
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{ "hdmi-tx-i2s", IMX_SC_R_HDMI_I2S, 1, false, 0},
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{ "hdmi-tx-i2c0", IMX_SC_R_HDMI_I2C_0, 1, false, 0},
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{ "hdmi-tx-pll0", IMX_SC_R_HDMI_PLL_0, 1, false, 0},
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{ "hdmi-tx-pll1", IMX_SC_R_HDMI_PLL_1, 1, false, 0},
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/* HDMI RX SS */
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{ "hdmi-rx", IMX_SC_R_HDMI_RX, 1, false, 0},
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{ "hdmi-rx-pwm", IMX_SC_R_HDMI_RX_PWM_0, 1, false, 0},
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{ "hdmi-rx-i2c0", IMX_SC_R_HDMI_RX_I2C_0, 1, false, 0},
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{ "hdmi-rx-bypass", IMX_SC_R_HDMI_RX_BYPASS, 1, false, 0},
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/* SECURITY SS */
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{ "sec-jr", IMX_SC_R_CAAM_JR2, 2, true, 2},
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/* BOARD SS */
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{ "board", IMX_SC_R_BOARD_R0, 8, true, 0},
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};
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static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
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.pd_ranges = imx8qxp_scu_pd_ranges,
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.num_ranges = ARRAY_SIZE(imx8qxp_scu_pd_ranges),
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};
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static struct imx_sc_ipc *pm_ipc_handle;
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static inline struct imx_sc_pm_domain *
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to_imx_sc_pd(struct generic_pm_domain *genpd)
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{
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return container_of(genpd, struct imx_sc_pm_domain, pd);
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}
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static void imx_sc_pd_get_console_rsrc(void)
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{
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struct of_phandle_args specs;
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int ret;
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if (!of_stdout)
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return;
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ret = of_parse_phandle_with_args(of_stdout, "power-domains",
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"#power-domain-cells",
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0, &specs);
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if (ret)
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return;
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imx_con_rsrc = specs.args[0];
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}
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static int imx_sc_get_pd_power(struct device *dev, u32 rsrc)
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{
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struct imx_sc_msg_req_get_resource_power_mode msg;
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struct imx_sc_rpc_msg *hdr = &msg.hdr;
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int ret;
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hdr->ver = IMX_SC_RPC_VERSION;
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hdr->svc = IMX_SC_RPC_SVC_PM;
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hdr->func = IMX_SC_PM_FUNC_GET_RESOURCE_POWER_MODE;
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hdr->size = 2;
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msg.data.req.resource = rsrc;
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|
|
ret = imx_scu_call_rpc(pm_ipc_handle, &msg, true);
|
|
if (ret)
|
|
dev_err(dev, "failed to get power resource %d mode, ret %d\n",
|
|
rsrc, ret);
|
|
|
|
return msg.data.resp.mode;
|
|
}
|
|
|
|
static int imx_sc_pd_power(struct generic_pm_domain *domain, bool power_on)
|
|
{
|
|
struct imx_sc_msg_req_set_resource_power_mode msg;
|
|
struct imx_sc_rpc_msg *hdr = &msg.hdr;
|
|
struct imx_sc_pm_domain *pd;
|
|
int ret;
|
|
|
|
pd = to_imx_sc_pd(domain);
|
|
|
|
hdr->ver = IMX_SC_RPC_VERSION;
|
|
hdr->svc = IMX_SC_RPC_SVC_PM;
|
|
hdr->func = IMX_SC_PM_FUNC_SET_RESOURCE_POWER_MODE;
|
|
hdr->size = 2;
|
|
|
|
msg.resource = pd->rsrc;
|
|
msg.mode = power_on ? IMX_SC_PM_PW_MODE_ON : IMX_SC_PM_PW_MODE_LP;
|
|
|
|
/* keep uart console power on for no_console_suspend */
|
|
if (imx_con_rsrc == pd->rsrc && !console_suspend_enabled && !power_on)
|
|
return -EBUSY;
|
|
|
|
ret = imx_scu_call_rpc(pm_ipc_handle, &msg, true);
|
|
if (ret)
|
|
dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
|
|
power_on ? "up" : "off", pd->rsrc, ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int imx_sc_pd_power_on(struct generic_pm_domain *domain)
|
|
{
|
|
return imx_sc_pd_power(domain, true);
|
|
}
|
|
|
|
static int imx_sc_pd_power_off(struct generic_pm_domain *domain)
|
|
{
|
|
return imx_sc_pd_power(domain, false);
|
|
}
|
|
|
|
static struct generic_pm_domain *imx_scu_pd_xlate(const struct of_phandle_args *spec,
|
|
void *data)
|
|
{
|
|
struct generic_pm_domain *domain = ERR_PTR(-ENOENT);
|
|
struct genpd_onecell_data *pd_data = data;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < pd_data->num_domains; i++) {
|
|
struct imx_sc_pm_domain *sc_pd;
|
|
|
|
sc_pd = to_imx_sc_pd(pd_data->domains[i]);
|
|
if (sc_pd->rsrc == spec->args[0]) {
|
|
domain = &sc_pd->pd;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return domain;
|
|
}
|
|
|
|
static struct imx_sc_pm_domain *
|
|
imx_scu_add_pm_domain(struct device *dev, int idx,
|
|
const struct imx_sc_pd_range *pd_ranges)
|
|
{
|
|
struct imx_sc_pm_domain *sc_pd;
|
|
bool is_off;
|
|
int mode, ret;
|
|
|
|
if (!imx_sc_rm_is_resource_owned(pm_ipc_handle, pd_ranges->rsrc + idx))
|
|
return NULL;
|
|
|
|
sc_pd = devm_kzalloc(dev, sizeof(*sc_pd), GFP_KERNEL);
|
|
if (!sc_pd)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
sc_pd->rsrc = pd_ranges->rsrc + idx;
|
|
sc_pd->pd.power_off = imx_sc_pd_power_off;
|
|
sc_pd->pd.power_on = imx_sc_pd_power_on;
|
|
|
|
if (pd_ranges->postfix)
|
|
snprintf(sc_pd->name, sizeof(sc_pd->name),
|
|
"%s%i", pd_ranges->name, pd_ranges->start_from + idx);
|
|
else
|
|
snprintf(sc_pd->name, sizeof(sc_pd->name),
|
|
"%s", pd_ranges->name);
|
|
|
|
sc_pd->pd.name = sc_pd->name;
|
|
if (imx_con_rsrc == sc_pd->rsrc)
|
|
sc_pd->pd.flags = GENPD_FLAG_RPM_ALWAYS_ON;
|
|
|
|
mode = imx_sc_get_pd_power(dev, pd_ranges->rsrc + idx);
|
|
if (mode == IMX_SC_PM_PW_MODE_ON)
|
|
is_off = false;
|
|
else
|
|
is_off = true;
|
|
|
|
dev_dbg(dev, "%s : %s\n", sc_pd->name, imx_sc_pm_mode[mode]);
|
|
|
|
if (sc_pd->rsrc >= IMX_SC_R_LAST) {
|
|
dev_warn(dev, "invalid pd %s rsrc id %d found",
|
|
sc_pd->name, sc_pd->rsrc);
|
|
|
|
devm_kfree(dev, sc_pd);
|
|
return NULL;
|
|
}
|
|
|
|
ret = pm_genpd_init(&sc_pd->pd, NULL, is_off);
|
|
if (ret) {
|
|
dev_warn(dev, "failed to init pd %s rsrc id %d",
|
|
sc_pd->name, sc_pd->rsrc);
|
|
devm_kfree(dev, sc_pd);
|
|
return NULL;
|
|
}
|
|
|
|
return sc_pd;
|
|
}
|
|
|
|
static int imx_scu_init_pm_domains(struct device *dev,
|
|
const struct imx_sc_pd_soc *pd_soc)
|
|
{
|
|
const struct imx_sc_pd_range *pd_ranges = pd_soc->pd_ranges;
|
|
struct generic_pm_domain **domains;
|
|
struct genpd_onecell_data *pd_data;
|
|
struct imx_sc_pm_domain *sc_pd;
|
|
u32 count = 0;
|
|
int i, j;
|
|
|
|
for (i = 0; i < pd_soc->num_ranges; i++)
|
|
count += pd_ranges[i].num;
|
|
|
|
domains = devm_kcalloc(dev, count, sizeof(*domains), GFP_KERNEL);
|
|
if (!domains)
|
|
return -ENOMEM;
|
|
|
|
pd_data = devm_kzalloc(dev, sizeof(*pd_data), GFP_KERNEL);
|
|
if (!pd_data)
|
|
return -ENOMEM;
|
|
|
|
count = 0;
|
|
for (i = 0; i < pd_soc->num_ranges; i++) {
|
|
for (j = 0; j < pd_ranges[i].num; j++) {
|
|
sc_pd = imx_scu_add_pm_domain(dev, j, &pd_ranges[i]);
|
|
if (IS_ERR_OR_NULL(sc_pd))
|
|
continue;
|
|
|
|
domains[count++] = &sc_pd->pd;
|
|
dev_dbg(dev, "added power domain %s\n", sc_pd->pd.name);
|
|
}
|
|
}
|
|
|
|
pd_data->domains = domains;
|
|
pd_data->num_domains = count;
|
|
pd_data->xlate = imx_scu_pd_xlate;
|
|
|
|
of_genpd_add_provider_onecell(dev->of_node, pd_data);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx_sc_pd_probe(struct platform_device *pdev)
|
|
{
|
|
const struct imx_sc_pd_soc *pd_soc;
|
|
int ret;
|
|
|
|
ret = imx_scu_get_handle(&pm_ipc_handle);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pd_soc = of_device_get_match_data(&pdev->dev);
|
|
if (!pd_soc)
|
|
return -ENODEV;
|
|
|
|
imx_sc_pd_get_console_rsrc();
|
|
|
|
return imx_scu_init_pm_domains(&pdev->dev, pd_soc);
|
|
}
|
|
|
|
static const struct of_device_id imx_sc_pd_match[] = {
|
|
{ .compatible = "fsl,imx8qxp-scu-pd", &imx8qxp_scu_pd},
|
|
{ .compatible = "fsl,scu-pd", &imx8qxp_scu_pd},
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static struct platform_driver imx_sc_pd_driver = {
|
|
.driver = {
|
|
.name = "imx-scu-pd",
|
|
.of_match_table = imx_sc_pd_match,
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = imx_sc_pd_probe,
|
|
};
|
|
builtin_platform_driver(imx_sc_pd_driver);
|
|
|
|
MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
|
|
MODULE_DESCRIPTION("IMX SCU Power Domain driver");
|
|
MODULE_LICENSE("GPL v2");
|