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df6561e602
Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
48 lines
588 B
Plaintext
48 lines
588 B
Plaintext
config SUNXI_CCU
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bool "Clock support for Allwinner SoCs"
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default ARCH_SUNXI
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if SUNXI_CCU
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# Base clock types
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config SUNXI_CCU_DIV
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_FRAC
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bool
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config SUNXI_CCU_GATE
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bool
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config SUNXI_CCU_MUX
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bool
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config SUNXI_CCU_PHASE
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bool
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# Multi-factor clocks
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config SUNXI_CCU_NK
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKM
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bool
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select RATIONAL
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NM
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bool
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select RATIONAL
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select SUNXI_CCU_FRAC
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select SUNXI_CCU_GATE
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config SUNXI_CCU_MP
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bool
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select SUNXI_CCU_GATE
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select SUNXI_CCU_MUX
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endif
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