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Add binding documentation for the PCI controller found on Versatile PB boards. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> CC: Pawel Moll <pawel.moll@arm.com> CC: Mark Rutland <mark.rutland@arm.com> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Kumar Gala <galak@codeaurora.org>
60 lines
1.6 KiB
Plaintext
60 lines
1.6 KiB
Plaintext
* ARM Versatile Platform Baseboard PCI interface
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PCI host controller found on the ARM Versatile PB board's FPGA.
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Required properties:
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- compatible: should contain "arm,versatile-pci" to identify the Versatile PCI
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controller.
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- reg: base addresses and lengths of the pci controller. There must be 3
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entries:
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- Versatile-specific registers
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- Self Config space
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- Config space
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- #address-cells: set to <3>
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- #size-cells: set to <2>
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- device_type: set to "pci"
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- bus-range: set to <0 0xff>
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- ranges: ranges for the PCI memory and I/O regions
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- #interrupt-cells: set to <1>
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- interrupt-map-mask and interrupt-map: standard PCI properties to define
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the mapping of the PCI interface to interrupt numbers.
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Example:
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pci-controller@10001000 {
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compatible = "arm,versatile-pci";
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device_type = "pci";
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reg = <0x10001000 0x1000
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0x41000000 0x10000
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0x42000000 0x100000>;
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bus-range = <0 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
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0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
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0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
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interrupt-map-mask = <0x1800 0 0 7>;
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interrupt-map = <0x1800 0 0 1 &sic 28
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0x1800 0 0 2 &sic 29
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0x1800 0 0 3 &sic 30
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0x1800 0 0 4 &sic 27
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0x1000 0 0 1 &sic 27
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0x1000 0 0 2 &sic 28
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0x1000 0 0 3 &sic 29
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0x1000 0 0 4 &sic 30
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0x0800 0 0 1 &sic 30
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0x0800 0 0 2 &sic 27
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0x0800 0 0 3 &sic 28
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0x0800 0 0 4 &sic 29
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0x0000 0 0 1 &sic 29
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0x0000 0 0 2 &sic 30
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0x0000 0 0 3 &sic 27
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0x0000 0 0 4 &sic 28>;
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};
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