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525b108e6d
The function mt7531_phy_mode_supported in the DSA driver set supported
mode to PHY_INTERFACE_MODE_GMII instead of PHY_INTERFACE_MODE_INTERNAL
for the internal PHY, so this check breaks the PHY initialization:
mt7530 mdio-bus:00 wan (uninitialized): failed to connect to PHY: -EINVAL
Remove the check to make it work again.
Reported-by: Hauke Mehrtens <hauke@hauke-m.de>
Fixes: e40d2cca01 ("net: phy: add MediaTek Gigabit Ethernet PHY driver")
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Tested-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
114 lines
3.0 KiB
C
114 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <linux/bitfield.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#define MTK_EXT_PAGE_ACCESS 0x1f
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#define MTK_PHY_PAGE_STANDARD 0x0000
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#define MTK_PHY_PAGE_EXTENDED 0x0001
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#define MTK_PHY_PAGE_EXTENDED_2 0x0002
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#define MTK_PHY_PAGE_EXTENDED_3 0x0003
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#define MTK_PHY_PAGE_EXTENDED_2A30 0x2a30
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#define MTK_PHY_PAGE_EXTENDED_52B5 0x52b5
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static int mtk_gephy_read_page(struct phy_device *phydev)
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{
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return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
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}
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static int mtk_gephy_write_page(struct phy_device *phydev, int page)
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{
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return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);
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}
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static void mtk_gephy_config_init(struct phy_device *phydev)
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{
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/* Disable EEE */
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phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0);
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/* Enable HW auto downshift */
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phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4));
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/* Increase SlvDPSready time */
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phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
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__phy_write(phydev, 0x10, 0xafae);
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__phy_write(phydev, 0x12, 0x2f);
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__phy_write(phydev, 0x10, 0x8fae);
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phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
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/* Adjust 100_mse_threshold */
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phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x123, 0xffff);
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/* Disable mcc */
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phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xa6, 0x300);
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}
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static int mt7530_phy_config_init(struct phy_device *phydev)
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{
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mtk_gephy_config_init(phydev);
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/* Increase post_update_timer */
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phy_write_paged(phydev, MTK_PHY_PAGE_EXTENDED_3, 0x11, 0x4b);
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return 0;
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}
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static int mt7531_phy_config_init(struct phy_device *phydev)
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{
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mtk_gephy_config_init(phydev);
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/* PHY link down power saving enable */
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phy_set_bits(phydev, 0x17, BIT(4));
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phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, 0xc6, 0x300);
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/* Set TX Pair delay selection */
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phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x13, 0x404);
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phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x14, 0x404);
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return 0;
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}
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static struct phy_driver mtk_gephy_driver[] = {
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{
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PHY_ID_MATCH_EXACT(0x03a29412),
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.name = "MediaTek MT7530 PHY",
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.config_init = mt7530_phy_config_init,
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/* Interrupts are handled by the switch, not the PHY
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* itself.
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*/
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.config_intr = genphy_no_config_intr,
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.handle_interrupt = genphy_handle_interrupt_no_ack,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.read_page = mtk_gephy_read_page,
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.write_page = mtk_gephy_write_page,
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},
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{
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PHY_ID_MATCH_EXACT(0x03a29441),
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.name = "MediaTek MT7531 PHY",
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.config_init = mt7531_phy_config_init,
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/* Interrupts are handled by the switch, not the PHY
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* itself.
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*/
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.config_intr = genphy_no_config_intr,
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.handle_interrupt = genphy_handle_interrupt_no_ack,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.read_page = mtk_gephy_read_page,
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.write_page = mtk_gephy_write_page,
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},
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};
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module_phy_driver(mtk_gephy_driver);
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static struct mdio_device_id __maybe_unused mtk_gephy_tbl[] = {
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{ PHY_ID_MATCH_VENDOR(0x03a29400) },
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{ }
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};
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MODULE_DESCRIPTION("MediaTek Gigabit Ethernet PHY driver");
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MODULE_AUTHOR("DENG, Qingfang <dqfext@gmail.com>");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(mdio, mtk_gephy_tbl);
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