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66d857b08b
There is a lot of common code that could be shared between the m68k and m68knommu arch branches. It makes sense to merge the two branches into a single directory structure so that we can more easily share that common code. This is a brute force merge, based on a script from Stephen King <sfking@fdwdc.com>, which was originally written by Arnd Bergmann <arnd@arndb.de>. > The script was inspired by the script Sam Ravnborg used to merge the > includes from m68knommu. For those files common to both arches but > differing in content, the m68k version of the file is renamed to > <file>_mm.<ext> and the m68knommu version of the file is moved into the > corresponding m68k directory and renamed <file>_no.<ext> and a small > wrapper file <file>.<ext> is used to select between the two version. Files > that are common to both but don't differ are removed from the m68knommu > tree and files and directories that are unique to the m68knommu tree are > moved to the m68k tree. Finally, the arch/m68knommu tree is removed. > > To select between the the versions of the files, the wrapper uses > > #ifdef CONFIG_MMU > #include <file>_mm.<ext> > #else > #include <file>_no.<ext> > #endif On top of this file merge I have done a simplistic merge of m68k and m68knommu Kconfig, which primarily attempts to keep existing options and menus in place. Other than a handful of options being moved it produces identical .config outputs on m68k and m68knommu targets I tested it on. With this in place there is now quite a bit of scope for merge cleanups in future patches. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
212 lines
6.3 KiB
C
212 lines
6.3 KiB
C
/*
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* Coldfire generic GPIO support
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*
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* (C) Copyright 2009, Steven King <sfking@fdwdc.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfgpio.h>
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static struct mcf_gpio_chip mcf_gpio_chips[] = {
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{
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.gpio_chip = {
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.label = "PIRQ",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value,
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.ngpio = 8,
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},
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.pddr = (void __iomem *) MCFEPORT_EPDDR,
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.podr = (void __iomem *) MCFEPORT_EPDR,
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.ppdr = (void __iomem *) MCFEPORT_EPPDR,
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},
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{
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.gpio_chip = {
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.label = "BUSCTL",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 8,
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.ngpio = 4,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
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.podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
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},
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{
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.gpio_chip = {
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.label = "BE",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 16,
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.ngpio = 4,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_BE,
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.podr = (void __iomem *) MCFGPIO_PODR_BE,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
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},
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{
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.gpio_chip = {
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.label = "CS",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 25,
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.ngpio = 3,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_CS,
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.podr = (void __iomem *) MCFGPIO_PODR_CS,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
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},
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{
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.gpio_chip = {
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.label = "FECI2C",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 32,
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.ngpio = 4,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
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.podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
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},
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{
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.gpio_chip = {
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.label = "QSPI",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 40,
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.ngpio = 4,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
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.podr = (void __iomem *) MCFGPIO_PODR_QSPI,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
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},
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{
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.gpio_chip = {
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.label = "TIMER",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 48,
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.ngpio = 4,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
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.podr = (void __iomem *) MCFGPIO_PODR_TIMER,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
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},
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{
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.gpio_chip = {
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.label = "UART",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 56,
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.ngpio = 8,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_UART,
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.podr = (void __iomem *) MCFGPIO_PODR_UART,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
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},
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{
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.gpio_chip = {
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.label = "FECH",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 64,
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.ngpio = 8,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
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.podr = (void __iomem *) MCFGPIO_PODR_FECH,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
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},
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{
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.gpio_chip = {
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.label = "FECL",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value_fast,
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.base = 72,
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.ngpio = 8,
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},
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.pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
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.podr = (void __iomem *) MCFGPIO_PODR_FECL,
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.ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
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.setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
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.clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
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},
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};
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static int __init mcf_gpio_init(void)
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{
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unsigned i = 0;
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while (i < ARRAY_SIZE(mcf_gpio_chips))
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(void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
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return 0;
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}
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core_initcall(mcf_gpio_init);
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